The objective of the proposed research is to develop advanced packaging and cooling platforms that enable scalable, high-performance 3D heterogeneous integration (HI). This work investigates a co-designed architecture in which high-aspect-ratio through-silicon vias (TSVs) are integrated directly within micropin-fin heat sinks (MPFHSs), providing both vertical electrical interconnects and efficient microfluidic cooling. Preliminary studies demonstrate TSV-compatible MPFHS structures through modeling, fabrication of HAR TSVs, and 3D thermal testbeds capable of dissipating heat fluxes exceeding 300 W/cm². To overcome TSV height limitations, a segmented TSV and micropin-fin approach is introduced, with numerical results showing improved TSV density, lower parasitics, and enhanced cooling efficacy. The proposed research will (1) model and experimentally validate segmented TSV and micropin-fin tiers, (2) demonstrate TSV-embedded microfluidic cooling for heterogeneous MMICs, (3) advance an extreme Bosch process for ultra-HAR TSVs, and (4) study cap-layer thickness effects on mechanical and electrical reliability of MPFHSs. Together, these efforts establish a scalable foundation for next-generation 3D HI systems.