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Workshop | XTPL live demo

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Next-generation semiconductor chiplet packaging is increasingly dependent on ultra-fine interposer interconnects to achieve the bandwidth, power efficiency, and integration density required for next generation devices as chiplets replace monolithic die designs, the need for extremely dense signal routing between dies becomes critical, particularly on glass and silicon interposers where connections must be made within a very small footprint.

XTPL’s Ultra-Precise Dispensing (UPD) technology offers a low-cost additive alternative to traditional lithography for creating these sub 5-micron interconnects. By directly depositing highly conductive materials with micron and sub-micron precision, XTPL enables fine line formation without the complexity, waste, and capital expense associated with subtractive photolithographic processing with excellent uniformity and yield.

Presenters:

Urs Berger 

Managing Director XTPL Inc.

Kyle Homan


Field Applications Engineer XTPL Inc.

Status

  • Workflow status: Published
  • Created by: rgrieco6
  • Created: 05/05/2026
  • Modified By: rgrieco6
  • Modified: 05/06/2026

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