The objective of this study is to advance ferroelectric memory for AI-era, memory-bound systems by uniting interface engineering with atomic-scale characterization. Motivated by growing bottlenecks in capacity, bandwidth, and reliability, we focus on ferroelectric devices and demonstrate that inserting an ultrathin WO3-x oxygen-reservoir layer at the ferroelectric/electrode interface activates a thermally driven self-healing mechanism that markedly improves endurance. By tuning the oxygen content of WO3-x, we further achieve nearly wake-up-free operation at 125˚C—the JEDEC qualifying temperature for 3D integration—while preserving the orthorhombic ferroelectric phase under thermal stress, in agreement with first-principles predictions. Complementing these device-level advances, plan-view scanning transmission electron microscopy directly visualizes nanoscale polarization textures in ultrathin ferroelectrics, revealing sub-nanometer ferroelectric domains bounded by alternating head-to-head and tail-to-tail 180˚ domain walls. These highly charged walls map the dipolar self-organization landscape that governs polarization switching in HfO₂-based ferroelectrics. Collectively, the results establish a materials-todevices pathway for reliable, high-temperature, wake-up-free ferroelectric operation and provide micro-to-macro insight that informs process/design co-optimization for nonvolatile tiers (e.g., Fe-NAND, FeRAM, FeFETs) in memory-on-logic architectures.