Challenges of power delivery through the board, package and on-die power delivery network require performing signal integrity and power integrity analysis. Successful engineering teams are adopting simulation and analysis-driven product design flows for IC, package and PCB power delivery network to address electrical and thermal challenges including EMI compliance and electrostatic discharge.
Come join us for this free lunch and learn to discover ANSYS Integrated Chip–Package–System Simulation:
• Discover the ANSYS chip–package–system workflow which provides chip-aware package and PCB analysis as well as package and PCB-aware chip analysis
• Learn about the Chip Power Model (CPM), a compact SPICE-correlated model of the full-chip power delivery network to accurately represent chip behavior for package and PCB simulation
• See how our 3D system-level thermal simulator is used to perform complex thermal management analysis.