The objective of the proposed research is to investigate how numerical representation, computation, and data delivery can be designed together for efficient and accurate memory-centric AI inference. Completed research develops an algorithm–hardware co-design approach for Kolmogorov–Arnold networks, combining hardware-aware quantization, input generation, weight mapping, and model configuration. Circuit and system evaluations demonstrate improvements in hardware efficiency and inference accuracy across lightweight and large-scale applications. Building on this work, the proposed research explores two directions: reducing the effects of numerical deviations in analog memory-based computation, and coordinating precision, data reuse, and memory delivery during inference. These efforts aim to improve energy efficiency and latency while maintaining output quality.