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Ph.D. Proposal Oral Exam - Adou Sangbone Assoa

Title:  Scalable Hardware Architecture for Array Signal Processing in Massive MIMO Systems

Committee:

Dr. Raychowdhury, Advisor

Dr. Sathe, Chair

Dr. Mukhopadhyay

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Summary

The objective of the proposed research is a software-hardware co-design of scalable array signal processors, specifically tailored for applications in massive MIMO systems. The primary goal is to engineer specialized, low-power hardware optimization solvers capable of real-time edge processing. These hardware architectures will be characterized by their modularity, parallel processing capabilities, and scalability.

Details

Wednesday
Sep 17 2025
01:00pm - 03:00pm

Location: Online

In campus calendar: No

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  • Workflow Status:Published
  • Created By:Daniela Staiculescu
  • Created:08/26/2025
  • Modified By:Daniela Staiculescu
  • Modified:08/26/2025

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