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PhD Defense Announcement - Haoran You

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Title: Early-Bird Training and Hardware-Aware Model Compression Towards Green and Ubiquitous Artificial Intelligence

 

Date: Thursday, April 17th

Time: 9:00 AM – 11:00 AM (Eastern Time)

Location: Georgia Tech Library Dissertation Defense Room

Space: Price Gilbert 4222 - Dissertation Defense Presentation

 

Zoom Link: 

https://gatech.zoom.us/j/3249649977?pwd=SWgxdHh1VWdaSCtPWnQvdno5ZGFIUT09 

 

Haoran You

Ph.D. Candidate

School of Computer Science

Georgia Institute of Technology

 

Committee:

 

Dr. Yingyan (Celine) Lin (Advisor, School of Computer Science, Georgia Tech)

Dr. Calton Pu (School of Computer Science, Georgia Tech)

Dr. Tushar Krishna (School of Computer Science and Electrical and Computer Engineering, Georgia Tech)

Dr. Tong Geng (Department of Electrical and Computer Engineering and Computer Science, University of Rochester)

Dr. Saibal Mukhopadhyay (School of Electrical and Computer Engineering, Georgia Tech)

 

Abstract:

 

Artificial intelligence (AI) has made remarkable breakthroughs across various applications, such as image perception, augmented and virtual reality (AR/VR), and AI-generated content (AIGC). However, critical research gaps remain between the powerful yet large-scale AI models and the computational constraints of both edge and cloud platforms, including (1) the efficiency gap, which hinders the acceleration of AI training and the ability to iterate quickly; (2) the scalability gap, which challenges efficient scaling and deployment of AI models on cloud GPUs; and (3) the accessibility gap, which limits the feasibility of running small-scale AI models on resource-constrained edge devices like smartphones, AR/VR headsets, and IoT sensors.

 

In this thesis, I will introduce three key strategies to enable efficient, scalable, and accessible AI across cloud and edge. First, I will introduce Early-Bird Tickets, a method that identifies efficient subnetworks from a large AI model during early training stages, achieving 5~10x training efficiency. Second, I will present ShiftAddNet, a hardware-aware AI algorithm that replaces costly multiplications with hardware-efficient shift and add operators, improving scalability and efficiency for large-scale vision and language models. Third, I will advocate for a holistic AI system co-design approach that optimizes both algorithms and hardware. For example, I will showcase ViTCoD, the first Vision Transformer (ViT) algorithm-hardware co-design framework that leverages the unique characteristics of ViTs to boost system performance. By combining these approaches, this thesis enables efficient, scalable, and accessible AI training and deployment, closing the three gaps towards ubiquitous AI across cloud and edge platforms.

Status

  • Workflow Status:Published
  • Created By:Tatianna Richardson
  • Created:04/02/2025
  • Modified By:Tatianna Richardson
  • Modified:04/02/2025

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