The objective of the proposed research is to advance Analog In-Memory Computing (AIMC) for efficient AI acceleration through comprehensive behavioral modeling and algorithm-hardware co-design. This work aims to address key challenges in AIMC systems, including scaling to support larger neural networks, mitigating the effects of analog noise on inference accuracy, and efficiently implementing complex deep neural network architectures such as transformers. The research builds upon enhancements to the NeuroSim simulation framework, enabling more accurate modeling of AIMC systems with support for emerging memory technologies like non-volatile capacitors (Nvcaps) and advanced neural network architectures. Key focus areas include developing noise mitigation strategies, exploring 3D heterogeneous integration for improved scalability, and investigating hardware-software co-design approaches for implementing transformers entirely on AIMC hardware.