Hua Zheng, Austin Jensen,
and Surya Tatapudi
Micron (Atlanta Design Center)

Monday, March 4
12:00 - 1:00 PM Eastern Time
Location: Callaway/GTMI bldg.,
Room 114

Lunch provided for in-person attendees, (registration not required).

If you can’t join us in-person, Zoom link: https://gatech.zoom.us/j/97918374814?pwd=QTk5TDFDb25OeWd4L3JwU2RtbzcrUT09

Abstract:
In this presentation, Hua Zheng will introduce Micron as a company, talk about today’s accomplishments and Micron’s vision. Austin will share details on our DDR5 SDRAM product in the eyes of verification engineering and Surya will share more some insight on powering AI with Micron’s HBM3E.

Bios:
Hua Zheng - A visionary pioneer and servant leader. Hua worked in Product Engineering and Design in his 25+ years tenure at Micron, focused on People, Culture and Community. Hua received a BS in Physics, Fudan University, Shanghai, 1983 and a MSEE Clemson University, 1990. He joined Micron in 1990 directly from graduate school, worked on Micron’s first Synchronous DRAM design and led Micron’s first graphic RAM design (SGRAM) Building and Leading 3 Micron Design Sites : Start Shanghai DRAM design with 14 members and has since grown to include NAND ASIC, SSD and mNAND product development teams, led the establishment of DEG’s India operations from the ground up to what is now a ~300 member R&D team. Now leading the recently formed Atlanta Design Center, which will serve as one of Micron’s key memory design and engineering locations. Hua holds over 30 approved patents.

Austin Jensen - Austin Jensen received a bachelor’s degree in electrical engineering with minors in computer science and mathematics from Utah State University (Logan, Utah USA) in 2014. He joined Micron Technology, Inc. (Boise, Idaho USA) in 2015 as a DRAM Test Engineer developing and maintaining tester production code for Micron's Hybrid Memory Cube products as well as Micron's initial DDR5 design. In 2018, he joined the Compute Verification team and has contributed to the timing and reliability verification of many of Micron's DDR4 and DDR5 designs. Recently he has relocated to Micron's new Atlanta Design Center where he is helping to bring up a new verification team and lead the efforts of verifying ongoing DDR5 designs.

Surya Tatapudi, Ph.D. - Dr. Surya Tatapudi received his M.S. degree (2003) and Ph.D. (2006) degree in electrical and computer engineering from Washington State University, Pullman, WA. He joined the DRAM Design Engineering Group of Micron Technology, Inc. (Boise, Idaho, USA) in 2006. He has worked on various DRAM and Emerging memory architectures including DDR3, DDR4, WIO2, LPDDR4, LPDDR5, HBM3E where he was responsible for high-speed digital circuits, mixed-signal circuits, Design For Test (DFT) circuits, package, power distribution network, power evaluation & optimization. He is currently a Director of HBM Design Engineering group where his team is responsible for next generation High Bandwidth Memory (HBM) designs which power cutting edge AI and High Performance Computing (HPC) applications. Dr. Tatapudi holds 10 approved U.S. patents.

This seminar is co-sponsored by the
Georgia Minority Business Development Agency (MBDA) Business Center.

The Georgia MBDA Business Center belongs to a national network of over 30 centers throughout the country funded by the Department of Commerce Minority Business Development Agency to help grow and strengthen Minority Business Enterprises (MBEs). It is operated by the Enterprise Innovation Institute (EI2), a unit of the Georgia Institute of Technology.