The objective of the proposed research is to demonstrate Analog Very Large Scale Integrated (AVLSI) systems for Machine Learning (ML) applications from transistor level design to the end-user interface. In this era of insatiable demand for computing power, limited single core improvement of digital devices and an ever-growing list of machine learning applications, analog computing presents an alternative path forward to deliver efficient solutions. The field of AVLSI circuits was initially postulated by Carver Mead to be significantly more space and energy efficient than digital VLSI. And yet, in the decades after, digital design, synthesis and computing scaled while analog was relegated to small sections of large-scale computing systems and academic explorations. This is due to the lack of configurability thought to be inherent to analog circuit design. This work demonstrates the first programmable analog standard cell library in both 130nm and 65nm process nodes, the first analog high level synthesis tool capable of configuring Field Programmable Analog Arrays (FPAAs) and generating Application Specific Integrated Circuits (ASICs) and establishes the primitives for end-to-end analog ML.