The objective of the proposed research is to design a novel neural stimulation and recording interface that meets the requirements of next-generation closed-loop neuromodulation systems. The proposed neural simulator demonstrates a technique for achieving spatially targeted neural stimulation and sub-50 mV worst case common-mode (CM) artifact in low-latency closed-loop neuromodulation applications. The approach utilizes vector stimulation across multiple electrodes, guided by computational methods and integrated memory for rapid stimulus pattern selection. Additionally, a combination of the stimulator circuit architecture and mixed-signal current imbalance compensation techniques efficiently suppress CM artifacts arising from the vector stimulation. These techniques are validated in a 180nm HV CMOS test-chip through a combination of bench, saline and in-vivo tests. The proposed neural recording interface architecture exhibits resilience against differential-mode stimulation artifacts. The design prioritizes low area and power consumption while delivering high-resolution digitized output data. We put forth a novel technique for the correction of feedback circuit non-linearities, enhancing Signal-to-Noise-and-Distortion Ratio performance. The recording interface further addresses the reduction of current draw from the input channels to prevent signal quality degradation. The proposed recording circuit is designed and fabricated in a 65nm CMOS process. Simulation results are presented to verify the functionalities and performance of the circuit.