This thesis is centered on the design of high-throughput compute accelerators, with a specific focus on applications in secure encryption, high-bandwidth RF emulation, and Multiple Input Multiple Output (MIMO) digital RF beamforming. We begin by proposing security-aware pipelining techniques that use algorithmic key diffusion to enhance the throughput of PRINCE encryption accelerators while maintaining robustness against side-channel attacks. This approach is crucial for securing high-bandwidth data transmission. Additionally, we introduce a custom lightweight power supply sensor that enables the detection of power side-channel attacks on encryption engines with minimal hardware overheads, further bolstering the security of these systems. Next, we present a near-memory digital compute accelerator for real-time emulation of RF interactions. This architecture allows for the simulation of complex RF interactions within dynamic environments, incorporating various physical phenomena. Lastly, we present a Compute-In-Memory based digital beamforming accelerator. This design confronts the core challenges of scalability and energy efficiency in large-scale MIMO RX digital beamformers. It achieves substantial power savings compared to traditional beamforming architectures while minimally impacting beam accuracy.