The continued miniaturization of complementary metal-oxide-semiconductors (CMOS) has been a core for enhancing their performance, expanding functionality, and reducing cost per cell by following Moore’s law. Similarly, memory devices have pursued relentless scaling the device dimension. A prime example is the state-of-the-art Flash memory, which has adopted layer stacking techniques to increase the memory density. As such, the trajectory towards emerging nonvolatile memories is a predictable evolution. Within this realm, the ferroelectric field-effect transistor (FeFET) stands out as a promising candidate. With attributes like fast switching speed and low operation voltage, FeFET is reshaping the landscape of memory technologies. To ensure its seamless integration into future architectures, this thesis delves into a comprehensive variation analysis of FeFETs, especially focusing on advanced technology nodes and three-dimensional architectures. Embracing this challenge, an avant-garde computational approach involving the Voronoi diagram becomes the linchpin for realistic modeling, capturing the unpredictable nature of ferroelectric grain distributions. In tandem with these explorations, the burgeoning field of machine learning offers a beacon of hope for enhancing analysis precision and efficiency due to its transformative capabilities. Its role in the semiconductor arena is no exception, providing tools for technology pathfinding, compact modeling, and performance analytics. In this light, this thesis introduces a machine learning-centric approach tailored for ferroelectric memory assessment, targeting significant reductions in design-technology co-optimization timeframes while sharpening predictive precision.