The objective of the proposed research is to overcome challenges faced by compute in-memory (CIM) and embedded non-volatile memory (eNVM). The combination of eNVM and CIM can greatly increase memory bandwidth and memory density, perform computation on the bitline of memory sub-arrays, and minimize data transport. Despite these exciting new properties, CIM with eNVM introduces problems not before faced by traditional CMOS and SRAM based designs. While some of these problems will be solved by further research and development, properties such as device variation, IR-drop, high write power, and low endurance will persist due to the physical limitations of the devices. As a result, circuit and system level designs must overcome these challenges to enable CIM with eNVM. In this thesis, we characterize these challenges based on data from fabricated chips and propose several methods to overcome device variation, IR-drop, and write constraints.