Title:  Reliability and Security of Compute-In-Memory Based Deep Neural Network Accelerators

Committee:

Dr. Shimeng Yu, ECE, Chair, Advisor

Dr. Callie Hao, ECE

Dr. Saibal Mukhopadhyay, ECE

Dr. Tushar Krishna, ECE

Dr. Ada Gavrilovska, CoC

Abstract: Compute-In-Memory (CIM) is a promising solution for accelerating DNNs at edge devices, utilizing mixed-signal computations. However, it requires more cross-layer designs from algorithm levels to hardware implementations as it behaves differently from the pure digital system. On one side, the mixed-signal computations of CIM face unignorable variations, which could hamper the software performance. On the other side, there are potential software/hardware security vulnerabilities with CIM accelerators. This research aims to solve the reliability and security issues in CIM design for accelerating Deep Neural Network (DNN) algorithms as they prevent the real-life use of the CIM-based accelerators. Some non-ideal effects in CIM accelerators are explored, which could cause reliability issues, and solved by the software-hardware co-design methods. In addition, different security vulnerabilities for SRAM-based CIM and eNVM-based CIM inference engines are defined, and corresponding countermeasures are proposed.