Title:  Domain-aware Genetic Algorithms for Hardware and Mapping Optimization for Efficient DNN Acceleration

Committee:

Dr. Tushar Krishna, ECE, Chair, Advisor

Dr. Vivek Sarkar, CoC

Dr. Callie Hao, ECE

Dr. Suvinay Subramanian, Google

Dr. Alexey Tumanov, CoC

Dr. Angshuman Parashar, NVIDIA

Abstract: Many SOTA DNN accelerator designs rely on a human-driven design process which costs huge engineering efforts. Also, it makes it increasingly harder to keep up with the fast innovation of DNN models. In this research, we will present how we leverage ML techniques to help automate some part of the DNN accelerator design process. we will show how we construct the design space of DNN accelerator, how we analyze the pros and cons of different search algorithms for our use-case, and how we develop customized algorithms for our HW and mapping exploration problem.