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Ph.D. Dissertation Defense - Ahmad Rezvanitabar
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Title: Integrated Electronics for Wireless Imaging Microsystems with CMUT Arrays
Committee:
Dr. Levent Degertekin, ECE, Chair, Advisor
Dr. Shaolan Li, ECE, Co-Advisor
Dr. Jennifer Hasler, ECE
Dr. Omer Inan, ECE
Dr. Costas Arvanitis, ME
Dr. Coskun Tekes, KSU
Abstract: Integration of transducer arrays with interface electronics in the form of single-chip CMUT-on-CMOS has emerged into the field of medical ultrasound imaging and is transforming this field. It has already been used in several commercial products such as handheld full-body imagers (Butterfly Network IQ+) and it is being implemented by commercial and academic groups for Intravascular Ultrasound (IVUS) and Intracardiac Echocardiography (ICE). However, large attenuation of ultrasonic waves transmitted through the skull has prevented ultrasound imaging of the brain. This research is a prime step toward implantable wireless microsystems that use ultrasound to image the brain by bypassing the skull. These microsystems offer autonomous scanning (beam steering and focusing) of the brain and transferring data out of the brain for further processing and image reconstruction. The objective of the presented research is to develop building blocks of an integrated electronics architecture for CMUT based wireless ultrasound imaging systems while providing a fundamental study on interfacing CMUT arrays with their associated integrated electronics in terms of electrical power transfer and acoustic reflection which would potentially lead to more efficient and high-performance systems. A fully wireless architecture for ultrasound imaging is demonstrated. An on-chip programmable transmit (TX) beamformer enables focusing and steering of ultrasound waves in the transmit mode while its on-chip bandpass noise shaping digitizer before the uplink minimizes the effect of path loss on the transmitted image data out of the brain. A single-chip application-specific integrated circuit (ASIC) is designed to realize the wireless architecture and interface with array elements, each of which includes a transceiver (TRX) front-end with a high-voltage (HV) pulser, a high-voltage T/R switch, and a low-noise amplifier (LNA). Novel design techniques are implemented in the system to enhance the performance of its building blocks.
Status
- Workflow Status:Published
- Created By:Daniela Staiculescu
- Created:12/01/2021
- Modified By:Daniela Staiculescu
- Modified:12/01/2021
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