Title:  Hardware Dynamical System for Solving Optimization Problems

Committee:

Dr. Arijit Raychowdhury, ECE, Chair , Advisor

Dr. Justin Romberg, ECE

Dr. Tushar Krishna, ECE

Dr. Muhannad Bakir, ECE

Dr. Keith Bowman, Purdue

Abstract: The objective of the proposed research is to find suitable architecture for solving large distributed discrete or continuous optimization problems. The main discrete optimization problem we used is distributed alternating direction method of multipliers (ADMM), for this we first built the prototype on FPGA, and then on ASIC, “OPTIMO”, a 65nm, 16-b, fully-programmable, spatial-array processor with 49-cores and a hierarchical multi-cast network for solving such problems. For continuous optimization problems, we present AC-SAT, an analog based circuits using traditional CMOS technology for solving a representative NP-complete optimization problem, the Boolean Satisfiability (SAT) problem. Through the measurement result, we demonstrate the relationship between optimization hardness as transient chaos and show that this architecture is highly scalable and configurable.