Title:  Effect of Fabrication Process Variation on Electrical Performance of Impedance Controlled 2 Micron Multilayer Redistribution Layer on Panel-based Interposers

Committee:

Dr. Rao Tummala, ECE, Chair , Advisor

Dr. Oliver Brand, ECE

Dr. Andrew Peterson, ECE

Dr. Venkatesh Sundaram, PRC

Dr. Suresh Sitaraman, ME

Abstract:

The objective of this PhD dissertation is to model, design and demonstrate impedance-matched 2 µm multilayer RDL lines and spaces for 2.5D panel-based interposers, compatible with 20 µm bump pitch, with glass as the core material. The fundamental studies in this research focus on exploring several unit process methods to address the process challenges, and systematically analyze the signal performance impact due to process variations using 3D electro-magnetic simulations, leading to impedance controlled RDL design and fabrication guidelines. This dissertation represents the first systematic design and demonstration study of 50- ohm controlled impedance, 2 µm CD transmission lines on glass interposers. SAP was selected as the front-up method for multilayer RDL fabrication on glass interposers, mainly due to its scalability to both wafers and panels, and its compatibility with high throughput manufacturing. The emerging embedded trace method inspired from wafer level dual-damascene processes was also analyzed by electromagnetic simulations.