Title:  CAD Tools and Methodologies for Reliable 3D IC Design, Analysis and Optimization

Committee:

Dr. Sung Kyu Lim, ECE, Chair , Advisor

Dr. Saibal Mukhopadhyay, ECE

Dr. Arijit Raychowdhury, ECE

Dr. Madhavan Swaminathan, ECE

Dr. Hyesoon Kim, CS

Abstract:

This work focuses on enabling 3D IC designs with a high reliability. This includes accurate parasitic extraction, timing, power analysis, and signal-power-thermal integrity analysis and optimization for both face-to-back and face-to-face bonded 3D ICs. To achieve this goal, CAD tools and methodologies for 3D IC design, analysis and optimization flows are proposed from multiple aspects of physical designs . First, a holistic CAD platform is proposed to address the need for accurate modeling and analyzing IR drop issues in a 3D DRAM system with several optimization methods from design, packaging and architectural policy perspective. Also, accurate extraction methods are proposed for TSV-to-TSV coupling parasitic extraction by using multi-TSV model and pattern-matching algorithm. Then, several noise-protection methods are proposed to alleviate signal coupling in 3D ICs. Further, a holistic and an in-context methodology are proposed for extraction of inter-die coupling parasitics in F2F 3D ICs with accuracy and complexity tradeoff comparisons. Last, multiple impacts from physical design and technology scaling are studied with our tool flow demonstrated on extraction of the next generation heterogeneous F2F 3D ICs.