Title:  High-speed, Low cost Test Platform using FPGA Technology

Committee:

Dr. David Keezer, ECE, Chair , Advisor

Dr. Abhijit Chatterjee, ECE

Dr. Linda Milor, ECE

Dr. Gee-Kung Chang, ECE

Dr. Paul Kohl, ChBE

Abstract: 

The object of this research is to develop a low-cost, adaptable testing platform for multi-GHz digital applications, with concentration on the test requirement of advanced devices. Since most advanced ATEs are very expensive, this equipment is not always available for testing cost-sensitive devices. The approach is to use recently-introduced advanced FPGAs for the core logic of the testing platform, thereby allowing for a low-cost, low power-consumption, high-performance, and adaptable test system. Furthermore to customize the testing system for specific applications, we implemented multiple extension testing modules base on this platform. With these extension modules, new functions can be added easily and the test system can be upgraded with specific features required for other testing purposes. The applications of this platform can help those digital devices to be delivered into market with shorter time, lower cost and help the development of the whole industry.