Title:  Architectural Techniques to Enable Reliable and Scalable Memory Systems

Committee: 

Dr. Qureshi, Advisor    

Dr. Mukhopadhyay, Chair

Dr. Yalamanchili

Abstract: The objective of the proposed research is use architectural techniques to enables reliable and scalable memory systems without the associated performance and power overheads. Currently, memory systems are used to store and deliver gigabytes of data to computing cores. However, as memory technology scales and evolves, memory cells tend to become un- reliable and the benefits of higher capacity are offset by a reduction in memory system reliability. The goal of this proposal is to design error correction schemes that can help scale current and future memory systems. This proposal is organized in four parts. The first three parts describes my research in current memory technologies and evaluation tools. I intend to highlight the pending research in fourth part of my proposal, and describe the concerns in the adoption of non-volatile memories and provide solutions that mitigate these concerns.