Georgia Tech ECE Interposer Research Team Wins Best Paper Award

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Jackie Nemeth

School of Electrical and Computer Engineering

404-894-2906

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Jinwoo Kim and a team of researchers from the Georgia Tech School of Electrical and Computer Engineering (ECE) won a best paper award at the 38th IEEE International Conference on Computer Design. 

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Jinwoo Kim and a team of researchers from the Georgia Tech School of Electrical and Computer Engineering (ECE) won a best paper award at the 38th IEEE International Conference on Computer Design. 

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  • ICCAD Best Paper Award Winning Team from Georgia Tech ECE ICCAD Best Paper Award Winning Team from Georgia Tech ECE
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Jinwoo Kim and a team of researchers from the Georgia Tech School of Electrical and Computer Engineering (ECE) won a best paper award at the 38th IEEE International Conference on Computer Design. The conference was held October 18-21, 2020 in a virtual format.

Joining him in receiving this award are his coauthors Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, and Hakki Torun, who are all ECE Ph.D. students, and ECE Professors Madhavan Swaminathan, Saibal Mukhopadhyay, and Sung Kyu Lim. Kim is advised by Lim, Chekuri and Rahman are advised by Mukhopadhyay, and Dolatsara and Torun are advised by Swaminathan.

The title of the award-winning paper is "Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration." The optimal selection of an interposer substrate is crucial in 2.5D systems, because its physical, material and electrical characteristics govern the overall system performance, reliability, and cost. Several materials have been proposed that offer various tradeoffs, including silicon, organic, and glass. In this paper, the research team conduct a quantitative comparison between two 2.5D integrated circuit (IC) designs based on silicon vs. liquid crystal polymer (LCP) interposer technologies for the first time. The team also investigates tradeoffs in power, performance and area (PPA), signal integrity (SI), and power integrity (PI), depending on the interposer technologies. Their benchmark is a large-scale RISC-V multi-core processor that is comparable to commercial products in terms of performance. Their designs are done at GDS-level and simulated with commercial quality sign-off tools that are developed by the team. This research is funded by the DARPA Electronics Resurgent Initiative under the CHIPS program.

2.5D heterogeneous integration of micro-electronics components using interposer technologies is rapidly becoming the norm in industry these days. Today, we find 2.5D chips from NVIDIA GPUs, AMD processors, and Intel machine learning accelerators. The place where micro-electronic components such as cores, memory, RF, analog, and sensors that are manufactured using different technologies and need to be integrated together, interposers are fast replacing the traditional System-on-Chip approach that is based on single chip.

Photo caption (clockwise from upper left): Jinwoo Kim, Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim, and Hakki Torun. 

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School of Electrical and Computer Engineering

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Student and Faculty, Student Research, Research, Computer Science/Information Technology and Security, Engineering, Nanotechnology and Nanoscience, Physics and Physical Sciences
Related Core Research Areas
Data Engineering and Science, Electronics and Nanotechnology
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Keywords
Jinwoo Kim, Chaitanya Krishna Chekuri, Venkata Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim, Georgia Tech, School of Electrical and Computer Engineering, 38th IEEE International Conference on Computer Design, silicon interposer, organic interposer, heterogeneous 2.5D chiplet integration, 2.5D systems, 2.5D integrated circuits, liquid crystal polymer (LCP), large-scale RISC-V multi-core processor, DARPA Electronics Resurgent Initiative, CHIPS program, microelectronics, cores, memory, RF, analog, sensors
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  • Created By: Jackie Nemeth
  • Workflow Status: Published
  • Created On: Nov 2, 2020 - 10:06am
  • Last Updated: Nov 3, 2020 - 9:42am