Title:  Three-dimensional Micro Fabrication Technologies for Electronic and Lab-on-chip Applications

Committee: 

Dr. Bakir, Advisor        

Dr. Naeemi, Chair

Dr. Brand

Abstract:

The objective of the proposed research is to address technology limitations in building three-dimensional (3D) structures for integrated circuits (ICs) and lab-on-chip applications. Denser integration of electronic enabled by heterogeneously stacked silicon tiers and interconnected using through-silicon-via (TSV) is being explored as an innovative approach to address the relentless demand for lower power consumption, and higher bandwidth density. Scaling TSVs, however, is challenging which necessitates developing novel subtractive and additive micro manufacturing techniques. Moreover, the emerging fine-grain 3D IC technology faces thermal challenges as the power wall limit in 3D systems is pronounced. To mitigate the dissipation of large heat fluxes generated across the entire silicon die and enabling thermal isolation between heterogeneously stacked silicon tiers, scaled monolithic microfluidic cooling is explored. Scaling nano and micro structures not only benefits semiconductor industry but also enables lab-on-chip technology. Pharmaceutical and medical lab equipment are often expensive and bulky that could ultimately be scaled and replaced with cost-effective multimodal lab-on-chip devices. The proposed work will target four objectives: (i) develop and demonstrate a subtractive fabrication technology for scaling high aspect ratio TSVs, (ii) investigate and demonstrate a monolithic fluid cooling strategy to address non-uniform heat dissipation across the silicon die in ICs or 3D stacked dice (iii) develop an additive fabrication technology for 3D printing of copper pillars as a proof-of-concept solution for various applications, and (iv) design and demonstrate a scaled 3D micro-array structure for in vitro characterization of red blood cells by leveraging the developed subtractive technology presented in task (i).