693259 event 1792099545 1792099616 <![CDATA[Ph.D. Dissertation Defense - Zachary Ellis]]> Title:  Application of Statistical Models to Secure Circuits for Improved Monitoring and Protection Against Side-Channel Attacks

Committee:

Dr. Arijit Raychowdhury, ECE, Chair, Advisor

Dr. Visvesh Sathe, ECE

Dr. Saibal Mukhopadhyay, ECE

Dr. Sanu Matthew, Intel

Dr. Anand Raghunathan, Purdue

]]> Like in many disciplines of engineering and the sciences, advancement in hardware security and physical attack resistance is often carried out both through theoretical reasoning and empirical measurement representing the diverse backgrounds of hardware security researchers. The objective of this research is to leverage the work of these scholars for the advancement of circuit techniques both for attack modeling and side-channel countermeasure implementation. These methods shall uphold the levels of security required for real world use and are informed by rigorous analysis of the underlining causes of side-channel leakage. Through both implemented hardware and pre-silicon analysis tools, a comprehensive coverage of attack prevention methodologies will be presented.

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