{"692116":{"#nid":"692116","#data":{"type":"event","title":"Ph.D. Proposal Oral Exam - Lance Fernandes","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle:\u0026nbsp; \u003C\/strong\u003E\u003Cem\u003EMaterial and Device Engineering of Ferroelectric NAND Flash Memory for Reliable High-Density Storage\u003C\/em\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003ECommittee:\u0026nbsp;\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Khan, Advisor\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EDr. Yu, Chair\u003C\/p\u003E\u003Cp\u003EDr. Garten\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EThe objective of the proposed research is to investigate scalable ferroelectric NAND (FE-NAND) memory architectures, with emphasis on device design and gate-stack engineering for memory-window (MW) optimization, retention, and pass-disturb reliability in silicon and oxide-semiconductor-channel devices. Gate stack engineering showed that Al2O3 dielectric is most effective as a tunnel dielectric layer (between two ferroelectric layers), while SiO2 performs best as a gate-blocking layer (between gate and ferroelectric layer). Combining both in a hybrid stack achieved an MW exceeding 11 V, highlighting the importance of dielectric material and placement. Channel-side interlayer studies further showed that SiO2 channel-IL provides approximately 15% higher MW, 5% lower retention loss, and 44% lower pass disturb than higher-k Al2O3 and HfO2, primarily due to reduced trap density. Finally, oxide-semiconductor-channel devices achieved approximately 1.5x larger MW than comparable silicon-channel devices but exhibited significant retention degradation from ambient oxygen interaction. Channel capping effectively suppressed this degradation and restored retention comparable to silicon devices, revealing an additional ambient-induced reliability mechanism unique to oxide-semiconductor FE-NAND\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"Material and Device Engineering of Ferroelectric NAND Flash Memory for Reliable High-Density Storage"}],"uid":"28475","created_gmt":"2026-08-29 14:17:47","changed_gmt":"2026-08-30 15:13:32","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2026-09-29T14:30:00-04:00","event_time_end":"2026-09-29T16:30:00-04:00","event_time_end_last":"2026-09-29T16:30:00-04:00","gmt_time_start":"2026-09-29 18:30:00","gmt_time_end":"2026-09-29 20:30:00","gmt_time_end_last":"2026-09-29 20:30:00","rrule":null,"timezone":"America\/New_York"},"location":"Room 231A, MiRC","extras":[],"related_links":[{"url":"https:\/\/teams.microsoft.com\/meet\/278223914711083?p=Rm65qvfCHJ1O6CRR8d","title":"Microsoft Teams Meeting link"}],"groups":[{"id":"434371","name":"ECE Ph.D. Proposal Oral Exams"}],"categories":[],"keywords":[{"id":"102851","name":"Phd proposal"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}