692090 event 1787919674 1787919761 <![CDATA[Ph.D. Dissertation Defense - Narasimha Vasishta Kidambi]]> Title:  Scalable Compute-in-Memory Architectures for Integer-Constrained Least-Squares Optimization

Committee:

Dr. Saibal Mukhopadhyay, ECE, Chair, Advisor

Dr. Suman Datta, ECE

Dr. Shimeng Yu, ECE

Dr. Callie Hao, ECE

Dr. Hyesoon Kim, CoC

]]> This dissertation presents scalable mixed-signal compute-in-memory architectures for solving integer-constrained least-squares problems. First, a fabricated 65-nm SRAM-based solver uses stochastic Hopfield dynamics to perform local optimization directly within memory. Next, a fabricated 28-nm analog compute-in-memory macro provides high-throughput vector–matrix multiplication, achieving 10.16 TOPS and a peak energy efficiency of 194.6 TOPS/W. Finally, these two hardware functions are integrated within a block-coordinate framework that decomposes large optimization problems into smaller subproblems. The results demonstrate how specialized compute-in-memory hardware can reduce data movement and provide an energy-efficient path toward solving larger integer-constrained optimization problems.

]]> <![CDATA[]]> https://teams.microsoft.com/l/meetup-join/19%3ameeting_MTMxNGFkYWQtOTdjYy00YmRiLWIzYzItNTkyNDJhNjViZDdm%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%222e30a72e-0c96-4144-8c9d-4c63c16c886c%22%7d 434381 1788 100811 1808