690129 event 1777929531 1777929638 <![CDATA[Ph.D. Proposal Oral Exam - Julian Arenas]]> Title:  Architecture and Control Strategies for Run-Time Optimization in Voltage Regulation

Committee: 

Dr. Sathe, Advisor 

Dr. Mukhopadhyay, Chair

Dr. Shaolan Li

]]> The objective of the proposed research is to develop architectural and control methods that improve system-level efficiency in voltage regulation for modern system-on-chip platforms. As integrated systems grow more heterogeneous, conventional power-delivery approaches use static voltage-domain partitioning, conservative guardband allocation, and fixed controller tuning, which limit both efficiency and performance. This work overcomes those limits by treating voltage regulation as a coordinated architecture-and-control problem that adapts dynamically to changing workload conditions. The first contribution introduces a dynamically reconfigurable integrated voltage-regulator fabric capable of reassigning buck-converter tiles and load domains at run time, thereby reducing dropout losses and improving efficiency across varying power states. The second contribution develops a proactive regulation framework in which the regulator leverages workload activity information to anticipate load transients and adjust supply behavior before voltage droop occurs, reducing required guardbands and mitigating stress on the feedback loop. The third contribution proposes a reduced-order adaptive tuning methodology for low-dropout regulators, using compact polynomial mappings to adjust controller gains across process, voltage, and temperature variation. Collectively, these contributions demonstrate that coordinated architectural flexibility, predictive regulation, and operating-point-aware calibration can substantially reduce power dissipation while preserving the stability and functional reliability of hierarchical power-delivery systems.

]]> <![CDATA[]]> https://teams.microsoft.com/meet/276832055511227?p=qLoph8mQP7T7Ic4Vzj 434371 1788 102851 1808