{"690110":{"#nid":"690110","#data":{"type":"event","title":"Ph.D. Dissertation Defense - Wei-Chun Wang","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle\u003C\/strong\u003E\u003Cem\u003E:\u0026nbsp; Energy and Area Efficient Mixed-Signal Computing-in-Memory Systems: from Device-Circuit Co-Design to RF Signal Processing Applications\u003C\/em\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003ECommittee:\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Saibal Mukhopadhyay, ECE, Chair, Advisor\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Suman Datta, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Justin Romberg, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Shimeng Yu, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Hyesoon Kim, ECE\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EThis thesis investigates mixed-signal compute-in-memory (CIM) architectures for energy- and area-efficient in-situ dimensionality reduction in radio-frequency (RF) sensing and communication systems. As wideband RF systems scale toward higher carrier frequencies and large antenna arrays, conventional digitize-everything architectures face prohibitive power, area, and data-movement overhead. To address this analog data deluge, this work develops analog compute-in-memory (ACIM) techniques that perform vector\u2013matrix multiplication directly on analog sensor signals before digitization, reducing ADC count and downstream processing cost. The thesis presents SRAM-based current-domain ACIM macros, mixed-precision ACIM with digital feature restoration, cryogenic and Fe-FinFET-based ACIM designs for improved efficiency, and adaptive ACIM for subspace tracking in dynamic RF environments. Finally, a 256-element Slepian beamforming accelerator demonstrates the system-level feasibility of ACIM-based complex vector\u2013matrix multiplication. Overall, this thesis shows that device\u2013circuit\u2013system co-designed mixed-signal CIM can provide a scalable and energy-efficient hardware path for next-generation RF signal processing systems.\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"Energy and Area Efficient Mixed-Signal Computing-in-Memory Systems: from Device-Circuit Co-Design to RF Signal Processing Applications "}],"uid":"28475","created_gmt":"2026-05-01 21:19:43","changed_gmt":"2026-05-01 21:20:46","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2026-05-07T15:30:00-04:00","event_time_end":"2026-05-07T17:30:00-04:00","event_time_end_last":"2026-05-07T17:30:00-04:00","gmt_time_start":"2026-05-07 19:30:00","gmt_time_end":"2026-05-07 21:30:00","gmt_time_end_last":"2026-05-07 21:30:00","rrule":null,"timezone":"America\/New_York"},"location":"Room 3126, Klaus","extras":[],"groups":[{"id":"434381","name":"ECE Ph.D. Dissertation Defenses"}],"categories":[],"keywords":[{"id":"100811","name":"Phd Defense"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}