689992 event 1777041761 1777041840 <![CDATA[Ph.D. Dissertation Defense - Rishov Sarkar]]> Title:  From acceleration to accelerating acceleration: applications and tools for democratizing hardware design using high-level synthesis

Committee:

Dr. Callie Hao, ECE, Chair, Advisor

Dr. Tushar Krishna, ECE

Dr. Hyesoon Kim, CoC

Dr. Ismail Bustany, AMD

Dr. Yuan Xie, HKUST

]]> Traditional hardware design flows require designers to write explicitly parallel, low- level RTL code in a hardware description language such as Verilog or VHDL. High-level synthesis provides a modern alternative that promises to raise the level of abstraction by synthesizing high-level languages like C++ into Verilog and VHDL, but it still re- quires significant hardware design expertise and specialized techniques to create perfor- mant, resource-efficient hardware designs. This research aims to facilitate high-level syn- thesis workflows through works on “acceleration”—providing exemplars of efficient HLS accelerators of modern machine learning models—and on “accelerating acceleration”— developing tools that improve high-level synthesis workflows in general. The goal is to help close the developer experience gap between software engineering and hardware de- sign, thereby empowering more people to design specialized hardware and advancing to- wards an agile workflow for hardware design.

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