686951 event 1766009167 1766009263 <![CDATA[Ph.D. Proposal Oral Exam - Mark Lee]]> Title:  Efficient and Side-Channel Secure Integrated Circuits for Cryptographic Applications: Pre-Silicon Verification Methods and Novel Circuit Design Techniques

Committee:

Dr. Mukhopadhyay, Advisor

Dr. Clark, Co-Advisor

Dr. Yu, Chair

Dr. Sathe

]]> The objective of the proposed research is to (1) develop electronic design automation (EDA) tools for electromagnetic side-channel attack (EMSCA) security verification of cryptographic integrated circuits at the layout level and (2) design efficient and robust compute-in-memory circuit topologies for cryptographic algorithms. To address (1), this work proposes a pre-Silicon EMSCA simulation and verification framework which is used to perform a comprehensive IC layout study on an AES encryption engine in 65nm CMOS technology, demonstrating that a vast design optimization space exists wherein different layouts that all meet PPA requirements exhibit drastically varying vulnerability to EMSCA. To address (2), this work proposes AsconCIM, a novel compute-in-memory circuit topology which is used as a robust hardware implementation of the Ascon encryption and hashing algorithms, achieving a low-area, low-power, reliable and reconfigurable hardware implementation for Internet-of-Things (IoT) devices. Together, the proposed contributions establish a step forward for the next generation of verifiably secure, efficient, and robust cryptographic integrated circuits.

]]> <![CDATA[]]> https://teams.microsoft.com/l/meetup-join/19%3ameeting_N2I1Y2M4MWItZjllZC00NWM4LThjNTAtZTg3MjE3YzRmNmE5%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%22be40f246-2b0d-4458-b5cb-580570c7821e%22%7d 434371 1788 102851 1808