{"685673":{"#nid":"685673","#data":{"type":"event","title":"Ph.D. Dissertation Defense - Tzu-Han Wang","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle\u003C\/strong\u003E\u003Cem\u003E:\u0026nbsp; High-resolution Wide-band Hybrid Analog-digital Converter with Reduced Peripheral Circuit Complexity\u003C\/em\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003ECommittee:\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Shaolan Li, ECE, Chair, Advisor\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Visvesh Sathe, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Saibal Mukhopadhyay, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Jane Gu, ECE\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Levent Degertekin, ME\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EThis dissertation presents a series of energy-efficient noise-shaping data converters that improve the performance, robustness, and integration of analog-to-digital interfaces. The proposed techniques address three major challenges in SAR ADCs\u2014limited input driving capability, kT\/C noise accumulation, and sensitivity to process, voltage, and temperature (PVT) variation. A third-order hybrid EF-CIFF SAR ADC achieves stable high-order noise shaping using a single dynamic amplifier with sampling noise cancellation. A fourth-order FIA-assisted EF-CRFF design integrates a noise-suppressed buffer-in-loop and kT\/C noise cancellation for robust low-OSR operation. Finally, a two-step incremental ADC (IADC) with an inter-stage sub-ranging and GENS technique attains high resolution and energy efficiency with relaxed driver requirements. Together, these architectures establish a unified framework for high-order noise-shaping SAR-based converters, enabling compact, low-power, and PVT-robust analog front ends for next-generation sensing and edge-AI applications.\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"High-resolution Wide-band Hybrid Analog-digital Converter with Reduced Peripheral Circuit Complexity "}],"uid":"28475","created_gmt":"2025-10-10 21:12:14","changed_gmt":"2025-10-10 21:13:29","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2025-10-24T13:00:00-04:00","event_time_end":"2025-10-24T15:00:00-04:00","event_time_end_last":"2025-10-24T15:00:00-04:00","gmt_time_start":"2025-10-24 17:00:00","gmt_time_end":"2025-10-24 19:00:00","gmt_time_end_last":"2025-10-24 19:00:00","rrule":null,"timezone":"America\/New_York"},"location":"Room W218, Van Leer","extras":[],"groups":[{"id":"434381","name":"ECE Ph.D. Dissertation Defenses"}],"categories":[],"keywords":[{"id":"100811","name":"Phd Defense"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}