{"681487":{"#nid":"681487","#data":{"type":"event","title":"Ph.D. Dissertation Defense - Shida Zhang","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle\u003C\/strong\u003E\u003Cem\u003E:\u0026nbsp; Reliability Characterization of Mixed-Signal Circuits: Integrated Voltage Regulators and Computing-in-Memory Systems\u003C\/em\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003ECommittee:\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003EDr. Saibal Mukhopadhyay, ECE, Chair, Advisor\u003C\/p\u003E\u003Cp\u003EDr. Visvesh Sathe, ECE\u003C\/p\u003E\u003Cp\u003EDr. Shimeng Yu, ECE\u003C\/p\u003E\u003Cp\u003EDr. Suman Datta, ECE\u003C\/p\u003E\u003Cp\u003EDr. Celine Lin, CoC\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EAs modern computing systems demand higher performance and energy efficiency, two emerging mixed-signal systems\u2014Integrated Voltage Regulators (VRs) and Computing-in-Memory (CIM) systems\u2014are increasingly vital in addressing power and data movement challenges. Integrated VRs provide fine-grained, on-chip power delivery, enabling dynamic voltage scaling and rapid transient response for advanced System-on-Chip (SoC) designs. CIM systems, by performing computation directly within memory arrays, address the limitations of traditional von Neumann architectures by reducing data transfer overhead, making them particularly effective for data-intensive applications such as artificial intelligence (AI) inference and signal processing. Despite their benefits, both Integrated VRs and CIM systems are vulnerable to long-term reliability issues caused by device aging mechanisms such as Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI). These aging effects degrade MOSFET characteristics over time, potentially leading to reduced efficiency, accuracy, and functional correctness.\u003C\/p\u003E\u003Cp\u003EThis research investigates the impact of aging on mixed-signal circuits, focusing on both Integrated VRs and CIM systems. For Integrated VRs, specifically Integrated Inductive Voltage Regulators (IVRs), a simulation framework is developed to model aging-induced degradation, complemented by silicon measurements from a 65nm CMOS test chip equipped with on-chip stress and sensing capabilities. Key performance metrics, including efficiency and transient response, are analyzed under stress. For CIM systems, the study centers on Analog CIM (ACIM), with a simulation framework and 28nm test chip used to assess accuracy degradation over time. A unified methodology is then proposed to compare aging resilience in both ACIM and Digital CIM (DCIM) architectures. The findings contribute to a deeper understanding of long-term reliability in mixed-signal systems and offer strategies for designing robust, energy-efficient computing architectures.\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"Reliability Characterization of Mixed-Signal Circuits: Integrated Voltage Regulators and Computing-in-Memory Systems "}],"uid":"28475","created_gmt":"2025-04-01 12:18:55","changed_gmt":"2025-04-01 12:20:17","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2025-04-09T11:00:00-04:00","event_time_end":"2025-04-09T13:00:00-04:00","event_time_end_last":"2025-04-09T13:00:00-04:00","gmt_time_start":"2025-04-09 15:00:00","gmt_time_end":"2025-04-09 17:00:00","gmt_time_end_last":"2025-04-09 17:00:00","rrule":null,"timezone":"America\/New_York"},"location":"Room 1315, Klaus","extras":[],"groups":[{"id":"434381","name":"ECE Ph.D. Dissertation Defenses"}],"categories":[],"keywords":[{"id":"100811","name":"Phd Defense"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}