680522 event 1739573938 1739574031 <![CDATA[Ph.D. Dissertation Defense - Oluwaseyi Akinwande]]> Title:  Surrogate Modeling for Semiconductor Packaging and Systems Using Machine Learning

Committee:

Dr. Madhavan Swaminathan, ECE, Chair, Advisor

Dr. Shimeng Yu, ECE, Co-Advisor

Dr. Sung-Kyu Lim, ECE

Dr. Saibal Mukhopadhyay, ECE

Dr. Surya Kalidindi, ME

Dr. Satish Kumar, ME

]]> Advanced packaging comprise high-dimensional design spaces with a plethora of design parameters to be tuned. In practice, a human expert spends a lot of time trying to meet specifications of hard constraints, and make nuanced trade-offs in design goals. Another challenge is that the available circuit simulators and multiphysics solvers are computationally expensive, with very high turnaround times. To this end, we develop surrogate modeling techniques that enable forward and inverse design, system identification, and design space exploration (DSE), accelerating the design process for applications in signal integrity of high-speed channels, 2.5D/3D heterogeneous integration, and sub-THz passive components. First, we develop both forward and inverse models, that substantially improve the turnaround times as compared to 3D electromagnetic (EM) field simulation, for use in optimizing the signal integrity performance of various circuits in microelectronics packaging. Furthermore, the dual problem of how to (1) develop a general unified surrogate model that can handle a variety of 3D EM circuit topologies, and (2) employ previously trained models and adapt them to new models, is addressed. We provide a formulation for transforming semiconductor packages into versatile circuit graphs, for a variety of topologies, imbued with structural information. The absence of such frameworks represents a gap in machine-learning-based electronic design automation which we fill by providing a set of building blocks to achieve significant improvements in modeling tasks. We then present a versatile forward modeling framework that allows one to quickly obtain the output response given a set of design parameters. We achieve the overarching goal of reducing the resources needed to create an ML-model library for signal integrity (SI) applications in microelectronics packaging. Lastly, we introduce a design space exploration framework for addressing high dimensionality and heteroscedastic noise that varies with design space parameters. This framework employs an active learning-driven multi-objective optimization approach to efficiently navigate complex, non-convex design spaces and achieve target specifications with reduced computational cost.

]]> <![CDATA[]]> https://teams.microsoft.com/l/meetup-join/19%3ameeting_NmRmMWNmZGQtZWQyMC00OWJhLTk1ZGUtY2NjMjg5MWE4Yjg2%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%2274796ba1-1ced-4bb5-a4d5-80dbfbf0d6ec%22%7d 434381 1788 100811 1808