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  <title><![CDATA[Ph.D. Proposal Oral Exam - Jackson Moody]]></title>
  <body><![CDATA[<p><strong>Title:&nbsp; </strong><em>Device-Physics-Aware Circuit Design for SiGe in Cryogenic Environments</em></p><p><strong>Committee:&nbsp;</strong></p><p>Dr.&nbsp;Cressler, Advisor&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</p><p>Dr. Li, Chair</p><p>Dr. Durgin</p>]]></body>
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      <value><![CDATA[Device-Physics-Aware Circuit Design for SiGe in Cryogenic Environments]]></value>
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      <value><![CDATA[<p>The objective of the proposed research is to develop robust approaches towards the design of cryogenic circuits for space systems. The focus is on implementing circuit-level mitigation strategies for low temperature effects. This relies on an understanding of the underlying device physics and the limitations of compact modeling. One thrust of the proposed research is to investigate and test design strategies for phase-locked loops at low temperatures in the context of space systems. Another thrust is to develop robust temperature-compensated integrated power detectors that can be used for in-situ tuning and problem diagnosis for cryogenic integrated RF systems.</p>]]></value>
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      <value><![CDATA[2025-01-31T10:30:00-05:00]]></value>
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      <timezone><![CDATA[America/New_York]]></timezone>
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      <value><![CDATA[Room 509, TSRB]]></value>
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          <item><![CDATA[ECE Ph.D. Proposal Oral Exams]]></item>
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