The proposed neural demonstrates spatially targeted stimulation with suppression of driver nonideality induced common-mode (CM) artifacts in low-latency closed-loop neuromodulation. The proposed approach utilizes computationally guided concurrent stimulation across multiple electrodes to achieve spatial selectivity in stimulation. The stimulator architecture supports flexible  storage of multiple pre-computed vector stimulus patterns in integrated memory, allowing rapid access and delivery of selected patterns in response to decoded neural activity. Additionally, a combination of the stimulator circuit architecture and mixed-signal current imbalance compensation techniques effectively suppress CM artifacts to below 50 mV. These techniques are demonstrated in a 180 nm HV CMOS test-chip containing 46 stimulation drivers of 26 V compliance and validated through a combination of bench, saline and in vivo tests.

Our proposed 32-channel recording analog front-end (AFE) architecture exhibits rapid recovery from differential-mode large stimulation artifacts while delivering high-resolution digitized data with ultra-low latency. The time-multiplexed AFE architecture ensures low area and power consumption, paving the way for building high-density neural interfaces. We introduce a novel technique for the correction of feedback Digital-to-Analog Converter (DAC) non-linearities, contributing to enhanced Signal-to-Noise-and-Distortion Ratio (SNDR) performance. Additionally, the recording interface reduces the current draw from the input channels to prevent signal quality degradation. Fabricated in a 65 nm CMOS process, the direct digitization AFE achieves 85.4 dB SNDR in a 500 Hz bandwidth, resulting in a Schreier figure of merit of 172.1 dB, which is the highest among the existing time-multiplexed neural AFEs.