Abstract: Physical design is a critical step in the design flow of modern VLSI circuits. It implements an abstract circuit design on a physical layout. With continuous increase of design complexity, physical design becomes extremely challenging and time-consuming due to the repeated design iterations for the optimization of performance, power, and area. To tackle such challenges, in this talk, we will introduce how to leverage heterogeneous CPU-GPU computing and AI techniques to accelerate physical design closure, including heterogeneous and reliability-aware timing analysis, cross-stage routability/timing/power prediction, and deep learning inspired optimization for 2D/2.5D/3D design scenarios. We will also introduce a large-scale AI for EDA dataset, CircuitNet, to enable accurate and ultrafast cross-stage prediction.

Biography: Yibo Lin is an assistant professor in the School of Integrated Circuits at Peking University. He received the B.S. degree in microelectronics from Shanghai Jiaotong University in 2013, and his Ph.D. degree from the Electrical and Computer Engineering Department of the University of Texas at Austin in 2018. His research interests include physical design, machine learning applications, and GPU/FPGA acceleration. He has received 7 Best Paper Awards at premier venues including DATE 2023, DATE 2022, TCAD 2021, and DAC 2019. He has also served on the Technical Program Committees of many major conferences, including DAC, ICCAD, ICCD, and ISPD.