{"674936":{"#nid":"674936","#data":{"type":"event","title":"Ph.D. Proposal Oral Exam - Ken Li","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle:\u0026nbsp; \u003C\/strong\u003E\u003Cem\u003EDigital-alike Analog-to-digital Converter Design and Their Automation\u003C\/em\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003ECommittee:\u0026nbsp;\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003EDr.\u0026nbsp;Shaolan Li, Advisor\u0026nbsp;\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EDr. Sathe, Chair\u003C\/p\u003E\u003Cp\u003EDr. Yu\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EThe objective of the proposed research is to explore digital-alike ADCs from the perspective of performance potential and automation potential. The first work presents an end-to-end automated VCO-based $\\Delta \\Sigma$ ADC generator. It exploits time-domain architectures so that the design can be generated on standard cell rather than transistor-level; thus, it speeds up and simplifies both the design phase and layout phase. Combined with an efficient knowledge-ML guided synthesis flow, it can translate input specifications to full system layout with reliable performance within minutes. This work also features a compact oscillator and system modeling method that facilitates light-resource accurate computation and network training. The generator is verified with 10 design cases in 65-nm and 28-nm processes, proving its capability of generating competitive design with good process portability. The second project introduces a high-precision third-order two-stage VCO-based ADC to investigate the potential of high-order VCO-based ADC. This design achieves enhanced resolution by extracting quantization noise from the first-stage VCO and directing it to the second-stage Time-to-Digital Converter (TDC). This innovative architecture not only addresses the non-linearity issues associated with VCO but also significantly reduces power consumption by employing a limited number of VCO stages. Additionally, the use of a gm-C as the first integrator contributes to substantial power savings. Moving forward, a fully synthesizable all-digital high-order VCO-based ADC will be designed.\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"Digital-alike Analog-to-digital Converter Design and Their Automation"}],"uid":"28475","created_gmt":"2024-05-29 20:52:27","changed_gmt":"2024-05-29 20:54:15","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2024-06-06T14:30:00-04:00","event_time_end":"2024-06-06T16:30:00-04:00","event_time_end_last":"2024-06-06T16:30:00-04:00","gmt_time_start":"2024-06-06 18:30:00","gmt_time_end":"2024-06-06 20:30:00","gmt_time_end_last":"2024-06-06 20:30:00","rrule":null,"timezone":"America\/New_York"},"location":"Online","extras":[],"related_links":[{"url":"https:\/\/teams.microsoft.com\/l\/meetup-join\/19%3ameeting_YzU3MzQ3NTktNjcwNC00MGFjLWFmMDgtNjFiYzgxNGY1MDYw%40thread.v2\/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%22e76190a6-076f-4d3d-b21a-a60b8521f0e7%22%7d","title":"Microsoft Teams Meeting link"}],"groups":[{"id":"434371","name":"ECE Ph.D. Proposal Oral Exams"}],"categories":[],"keywords":[{"id":"102851","name":"Phd proposal"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}