{"674237":{"#nid":"674237","#data":{"type":"news","title":"Researchers Blazing New Trails with Superchip Named After Computing Pioneer","body":[{"value":"\u003Cp\u003EComputing research at Georgia Tech is getting faster thanks to a new state-of-the-art processing chip named after a female computer programming pioneer.\u003C\/p\u003E\u003Cp\u003ETech is one of the first research universities in the country to receive the GH200 Grace Hopper Superchip from NVIDIA for testing, study, and research.\u003C\/p\u003E\u003Cp\u003EDesigned for large-scale artificial intelligence (AI) and high-performance computing applications, the GH200 is intended for large language model (LLM) training, recommender systems, graph neural networks, and other tasks.\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EAlexey Tumanov and Tushar Krishna procured Georgia Tech\u2019s first pair of\u0026nbsp;\u003Ca href=\u0022https:\/\/www.nvidia.com\/en-us\/data-center\/grace-hopper-superchip\/\u0022\u003EGrace Hopper chips\u003C\/a\u003E. Spencer Bryngelson attained four more GH200s, which will arrive later this month.\u003C\/p\u003E\u003Cp\u003E\u201cWe are excited about this new design that puts everything onto one chip and accessible to both processors,\u201d said Will Powell, a College of Computing research technologist.\u003C\/p\u003E\u003Cp\u003E\u201cThe Superchip\u2019s design increases computation efficiency where data doesn\u2019t have to move as much and all the memory is on the chip.\u201d\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EA key feature of the new processing chip is that the central processing unit (CPU) and graphics processing unit (GPU) are on the same board.\u003C\/p\u003E\u003Cp\u003ENVIDIA\u2019s NVLink Chip-2-Chip (C2C) interconnect joins the two units together. C2C delivers up to 900 gigabytes per second of total bandwidth, seven times faster than PCIe Gen5 connections used in newer accelerated systems. \u0026nbsp;\u003C\/p\u003E\u003Cp\u003EAs a result, the two components share memory and process data with more speed and better power efficiency. This feature is one that the Georgia Tech researchers want to explore most.\u003C\/p\u003E\u003Cp\u003E\u003Ca href=\u0022https:\/\/faculty.cc.gatech.edu\/~atumanov\/\u0022\u003ETumanov\u003C\/a\u003E,\u0026nbsp;an assistant professor in the School of Computer Science, and his Ph.D. student Amey Agrawal, are testing machine learning (ML) and LLM workloads on the chip. Their work with the GH200 could lead to more sustainable computing methods that keep up with the exponential growth of LLMs.\u003C\/p\u003E\u003Cp\u003EThe advent of household LLMs, like ChatGPT and Gemini, pushes the limit of current architectures based on GPUs. The chip\u2019s design overcomes known CPU-GPU bandwidth limitations.\u0026nbsp;\u003Ca href=\u0022https:\/\/gatech-sysml.github.io\/\u0022\u003ETumanov\u2019s group\u003C\/a\u003E\u0026nbsp;will put that design to the test through their studies.\u0026nbsp;\u003C\/p\u003E\u003Cp\u003E\u003Ca href=\u0022https:\/\/tusharkrishna.ece.gatech.edu\/\u0022\u003EKrishna\u003C\/a\u003E\u0026nbsp;is an associate professor in the School of Electrical and Computer Engineering and associate director of the Center for Research into Novel Computing Hierarchies (\u003Ca href=\u0022https:\/\/crnch.gatech.edu\/\u0022\u003ECRNCH\u003C\/a\u003E).\u003Cbr\u003E\u003Cbr\u003EHis research focuses on optimizing data movement in modern computing platforms, including AI\/ML accelerator systems. Ph.D. student Hao Kang uses the GH200 to analyze LLMs exceeding 30 billion parameters. This study will enable labs to explore deep learning optimizations with the new chip. \u0026nbsp;\u003C\/p\u003E\u003Cp\u003E\u003Ca href=\u0022https:\/\/comp-physics.group\/\u0022\u003EBryngelson\u003C\/a\u003E, an assistant professor in the School of Computational Science and Engineering, will use the chip to compute and simulate fluid and solid mechanics phenomena. His lab can use the CPU to reorder memory and perform disk writes while the GPU does parallel work. This capability is expected to significantly reduce the computational burden for some applications.\u003Cbr\u003E\u003Cbr\u003E\u201cTraditional CPU to GPU communication is slower and introduces latency issues because data passes back and forth over a PCIe bus,\u201d Powell said. \u201cSince they can access each other\u2019s memory and share in one hop, the Superchip\u2019s architecture boosts speed and efficiency.\u201d\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EGrace Hopper is the inspirational namesake for the chip. She pioneered many developments in computer science that formed the foundation of the field today. \u0026nbsp;\u003C\/p\u003E\u003Cp\u003EHopper invented the first compiler, a program that translates computer source code into a target language. She also wrote the earliest programming languages, including COBOL, which is still used today in data processing.\u0026nbsp;\u003C\/p\u003E\u003Cp\u003EHopper joined the U.S. Navy Reserve during World War II, tasked with programming the Mark I computer. She retired as a rear admiral in August 1986 after 42 years of military service.\u003C\/p\u003E\u003Cp\u003EGeorgia Tech researchers hope to preserve Hopper\u2019s legacy using the technology that bears her name and spirit for innovation to make new discoveries.\u003C\/p\u003E\u003Cp\u003E\u201cNVIDIA and other vendors show no sign of slowing down refinement of this kind of design, so it is important that our students understand how to get the most out of this architecture,\u201d said Powell.\u0026nbsp;\u003C\/p\u003E\u003Cp\u003E\u201cJust having all these technologies isn\u2019t enough. People must know how to build applications in their coding that actually benefit from these new architectures. That is the skill.\u201d\u0026nbsp;\u003C\/p\u003E","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EComputing research at Georgia Tech is getting faster thanks to a new state-of-the-art processing chip named after a female computer programming pioneer.\u003C\/p\u003E\r\n\r\n\u003Cp\u003ETech is one of the first research universities in the country to receive the GH200 Grace Hopper Superchip from NVIDIA for testing, study, and research.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDesigned for large-scale artificial intelligence (AI) and high-performance computing applications, the GH200 is intended for large language model (LLM) training, recommender systems, graph neural networks, and other tasks.\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAlexey Tumanov and Tushar Krishna procured Georgia Tech\u2019s first pair of\u0026nbsp;\u003Ca href=\u0022https:\/\/www.nvidia.com\/en-us\/data-center\/grace-hopper-superchip\/\u0022\u003EGrace Hopper chips\u003C\/a\u003E. Spencer Bryngelson attained four more GH200s, which will arrive later this month.\u003C\/p\u003E\r\n","format":"limited_html"}],"field_summary_sentence":[{"value":"Georgia Tech is one of the first research universities in the country to receive the GH200 Grace Hopper Superchip from NVIDIA for testing, study, and research."}],"uid":"36319","created_gmt":"2024-04-17 13:20:18","changed_gmt":"2024-06-04 01:23:28","author":"Bryant Wine","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2024-04-17T00:00:00-04:00","iso_date":"2024-04-17T00:00:00-04:00","tz":"America\/New_York"},"extras":[],"hg_media":{"673730":{"id":"673730","type":"image","title":"GH200 Superchip_cropped.jpg","body":null,"created":"1713360026","gmt_created":"2024-04-17 13:20:26","changed":"1713360026","gmt_changed":"2024-04-17 13:20:26","alt":"NVIDIA GH200 Grace Hopper Superchip","file":{"fid":"257159","name":"GH200 Superchip_cropped.jpg","image_path":"\/sites\/default\/files\/2024\/04\/17\/GH200%20Superchip_cropped.jpg","image_full_path":"http:\/\/hg.gatech.edu\/\/sites\/default\/files\/2024\/04\/17\/GH200%20Superchip_cropped.jpg","mime":"image\/jpeg","size":130959,"path_740":"http:\/\/hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/2024\/04\/17\/GH200%20Superchip_cropped.jpg?itok=LvhDEP82"}},"673731":{"id":"673731","type":"image","title":"Will Powell GH200 1.jpg","body":null,"created":"1713360061","gmt_created":"2024-04-17 13:21:01","changed":"1713360061","gmt_changed":"2024-04-17 13:21:01","alt":"Will Powell NVIDIA GH200 Grace Hopper Superchip","file":{"fid":"257160","name":"Will Powell GH200 1.jpg","image_path":"\/sites\/default\/files\/2024\/04\/17\/Will%20Powell%20GH200%201.jpg","image_full_path":"http:\/\/hg.gatech.edu\/\/sites\/default\/files\/2024\/04\/17\/Will%20Powell%20GH200%201.jpg","mime":"image\/jpeg","size":3191657,"path_740":"http:\/\/hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/2024\/04\/17\/Will%20Powell%20GH200%201.jpg?itok=3_p1KnGf"}}},"media_ids":["673730","673731"],"related_links":[{"url":"https:\/\/www.cc.gatech.edu\/news\/researchers-blazing-new-trails-superchip-named-after-computing-pioneer","title":"Researchers Blazing New Trails with Superchip Named After Computing Pioneer"}],"groups":[{"id":"47223","name":"College of Computing"},{"id":"50877","name":"School of Computational Science and Engineering"}],"categories":[{"id":"153","name":"Computer Science\/Information Technology and Security"}],"keywords":[{"id":"187915","name":"go-researchnews"},{"id":"192863","name":"go-ai"},{"id":"10199","name":"Daily Digest"},{"id":"654","name":"College of Computing"},{"id":"166983","name":"School of Computational Science and Engineering"},{"id":"15030","name":"high-performance computing"},{"id":"9153","name":"Research Horizons"}],"core_research_areas":[{"id":"39431","name":"Data Engineering and Science"},{"id":"39541","name":"Systems"}],"news_room_topics":[{"id":"71881","name":"Science and Technology"}],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003EBryant Wine, Communications Officer\u003Cbr\u003Ebryant.wine@cc.gatech.edu\u003C\/p\u003E","format":"limited_html"}],"email":[],"slides":[],"orientation":[],"userdata":""}}}