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  <title><![CDATA[Ph.D. Proposal Oral Exam - Oluwaseyi Akinwande]]></title>
  <body><![CDATA[<p><span><span><span><strong><span>Title:&nbsp; </span></strong><em><span>Surrogate Modeling For Semiconductor Packaging Using Machine Learning</span></em></span></span></span></p>

<p><span><span><strong><span>Committee:&nbsp; </span></strong></span></span></p>

<p><span><span><span>Dr. </span><span>Swaminathan</span><span>, Advisor</span></span></span></p>

<p><span><span><span>Dr. Yu, Co-Advisor</span>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></p>

<p><span><span><span>Dr. </span><span>Mukhopadhyay</span><span>, Chair</span></span></span></p>

<p><span><span><span>Dr. </span><span>Lim</span></span></span></p>
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      <value><![CDATA[Surrogate Modeling For Semiconductor Packaging Using Machine Learning]]></value>
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      <value><![CDATA[<p><span><span>The objective of the proposed research is to develop machine-learning models and algorithms for automating the electrical design processes associated with electronic packaging. Otherwise known as surrogate modeling, this includes enabling forward design, inverse design, system identification, and design space exploration (DSE), with applications ranging from signal integrity to sub-THz wireless communication. First, we develop and demonstrate both forward and inverse models, that substantially improves the turnaround times as compared to 3D electromagnetic (EM) field simulation, for use in optimizing the signal integrity performance of various circuits in microelectronics packaging. Furthermore, the dual problem of how to (1) develop a general unified surrogate model that can handle a variety of 3D electromagnetic (EM) circuit topologies, and (2) employ previously trained models and adapt them to new models, is addressed. We provide a formulation for transforming semiconductor packages into versatile circuit graphs, for a variety of topologies, imbued with structural information. The absence of such frameworks represents a gap in machine-learning-based electronic design automation which we fill by providing a set of building blocks to achieve significant improvements in modeling tasks. We then present a versatile forward modeling framework that allows one to quickly obtain the output response given a set of design parameters. We achieve the overarching goal of reducing the resources needed to create an ML-model library for signal integrity (SI) applications in microelectronics packaging. This proposal also discusses plans for future work on intelligent design space exploration and multi-objective optimization of advanced packaging.</span></span></p>
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      <value><![CDATA[2024-04-12T15:00:00-04:00]]></value>
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      <value><![CDATA[Room W218, Van Leer]]></value>
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        <url>https://teams.microsoft.com/l/meetup-join/19%3ameeting_MDJjOTUxMjgtYTkzZC00NjhhLWI3MWEtODcwMjgyMWJlZjJi%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%2274796ba1-1ced-4bb5-a4d5-80dbfbf0d6ec%22%7d</url>
        <link_title><![CDATA[Microsoft Teams Meeting link]]></link_title>
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