{"674014":{"#nid":"674014","#data":{"type":"event","title":"Ph.D. Proposal Oral Exam - Shida Zhang","body":[{"value":"\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cstrong\u003E\u003Cspan\u003ETitle:\u0026nbsp; \u003C\/span\u003E\u003C\/strong\u003E\u003Cem\u003E\u003Cspan\u003EReliability Characterization of Mixed-signal Circuits: Integrated Voltage Regulators and Computing-In-Memory systems\u003C\/span\u003E\u003C\/em\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cstrong\u003E\u003Cspan\u003ECommittee:\u0026nbsp; \u003C\/span\u003E\u003C\/strong\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003EMukhopadhyay\u003C\/span\u003E\u003Cspan\u003E, Advisor\u003C\/span\u003E\u0026nbsp;\u0026nbsp;\u0026nbsp; \u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003ESathe\u003C\/span\u003E\u003Cspan\u003E, Chair\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003EAugustine\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003EThe objective of the proposed research is to assess the reliability of mixed-signal circuits, particularly integrated voltage regulators and Computing-In-Memory (CIM) systems, in the context of aging mechanisms like Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI). These mechanisms are known to degrade MOSFET devices, impacting circuit performance and efficiency. The study aims to reduce design safety margins by gaining a deeper understanding of these aging effects, thereby enhancing circuit performance. Key components of the research include the development of simulation frameworks and real-world testing for integrated voltage regulators and CIM systems. The first phase involves creating a simulation model to analyze the impact of aging on Integrated Inductive Voltage Regulators (IVR). This model examines how aging affects each IVR component and the overall performance degradation. Complementing this, an IVR designed for 65nm CMOS technology, featuring on-chip stress and measurement circuits, is used to study NBTI and HCI-induced aging effects on IVR components and their influence on key performance metrics like transient response and efficiency. The research also extends to analog Computing-In-Memory (ACIM) systems. A simulation framework is developed to understand the accuracy degradation in ACIM due to aging. This framework explores how different circuit designs and properties are impacted. To validate these findings, an ACIM test chip in 28nm CMOS undergoes stress testing and measurement. Subsequently, a comprehensive framework will be proposed to estimate and compare aging effects across various CIM systems, providing a broader perspective on their degradation and tolerance to aging. The final objective is to design an ACIM macro that includes circuits for aging characterization and tolerance, aimed at compensating for accuracy loss and enhancing overall reliability. Overall, this research effectively delineates a detailed overview of aging effects on mixed-signal circuits and offers innovative approaches to understanding and mitigating aging effects in mixed-signal systems, aiming to improve their longevity and functionality.\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n","format":"limited_html"}],"field_summary_sentence":[{"value":"Reliability Characterization of Mixed-signal Circuits: Integrated Voltage Regulators and Computing-In-Memory systems"}],"uid":"28475","created_gmt":"2024-04-04 22:15:41","changed_gmt":"2024-04-04 22:17:24","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2024-04-12T14:30:00-04:00","event_time_end":"2024-04-12T16:30:00-04:00","event_time_end_last":"2024-04-12T16:30:00-04:00","gmt_time_start":"2024-04-12 18:30:00","gmt_time_end":"2024-04-12 20:30:00","gmt_time_end_last":"2024-04-12 20:30:00","rrule":null,"timezone":"America\/New_York"},"location":"Room 1212, Klaus ","extras":[],"groups":[{"id":"434371","name":"ECE Ph.D. Proposal Oral Exams"}],"categories":[],"keywords":[{"id":"102851","name":"Phd proposal"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}