{"671524":{"#nid":"671524","#data":{"type":"news","title":"Georgia Tech and Samsung Look to Unleash the Future of Digital Storage","body":[{"value":"\u003Cp\u003EThe rise of artificial intelligent (AI)-driven marvels hinges on cutting-edge data storage solutions. Without efficient data storage, applications like self-driving cars, life-saving healthcare diagnostics, and responsive voice assistants would fall short of their true potential.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAt the forefront of this evolving data storage landscape, a collaboration between the\u0026nbsp;\u003Ca href=\u0022https:\/\/www.gatech.edu\/\u0022\u003EGeorgia Institute of Technology\u003C\/a\u003E\u0026nbsp;and\u0026nbsp;\u003Ca href=\u0022https:\/\/www.samsung.com\/us\/\u0022 rel=\u0022noreferrer\u0022\u003ESamsung\u003C\/a\u003E\u0026nbsp;seeks to substantially decrease the voltage in existing technology, unlocking the full potential of AI systems.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u201cFinding innovative solutions in data storage is paramount, it\u2019s not just about saving photos or documents anymore. The storage needed is about enabling AI systems to transform how we interact with our devices, the world around us, and even each other,\u201d said\u0026nbsp;\u003Ca href=\u0022https:\/\/ece.gatech.edu\/directory\/asif-islam-khan\u0022\u003EAsif Khan\u003C\/a\u003E, an assistant professor in the\u0026nbsp;\u003Ca href=\u0022https:\/\/ece.gatech.edu\/\u0022\u003ESchool of Electrical and Computer Engineering\u003C\/a\u003E\u0026nbsp;(ECE) with a joint appointment in the\u0026nbsp;\u003Ca href=\u0022https:\/\/www.mse.gatech.edu\/\u0022\u003ESchool of Materials Science and Engineering\u003C\/a\u003E\u0026nbsp;(MSE).\u003C\/p\u003E\r\n\r\n\u003Cp\u003EKhan\u0027s lab is spearheading the collaboration which brings together three ECE labs, including those of Professors\u0026nbsp;\u003Ca href=\u0022https:\/\/ece.gatech.edu\/directory\/suman-datta\u0022\u003ESuman Datta\u003C\/a\u003E\u0026nbsp;and\u0026nbsp;\u003Ca href=\u0022https:\/\/ece.gatech.edu\/directory\/shimeng-yu\u0022\u003EShimeng Yu\u003C\/a\u003E. The lead author of the paper is Dipjyoti Das, a postdoctoral fellow under Khan\u0027s supervision. The second author, Hyeonwoo Park, conducts research under Datta. The team is joined by researchers from MSE, the\u0026nbsp;\u003Ca href=\u0022https:\/\/research.gatech.edu\/materials\u0022\u003EInstitute of Materials\u003C\/a\u003E, the\u0026nbsp;\u003Ca href=\u0022https:\/\/research.gatech.edu\/nano\u0022\u003EInstitute of Electronics and Nanotechnology\u003C\/a\u003E, and a dedicated team from Samsung.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u201cThis is a pivotal era of transformation and opportunity in high-memory compute,\u201d said co-author Suhwan Lim, an engineer at Samsung. \u201cStrategic intersectoral relationships like this between Samsung and Georgia Tech nurture innovative thinking and lead to exciting experiential results that push us all forward.\u201d\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAdding to the already substantial Georgia Tech presence in the field of computer memory storage, the team\u0027s findings will be featured at the upcoming\u0026nbsp;\u003Ca href=\u0022https:\/\/www.ieee-iedm.org\/\u0022 rel=\u0022noreferrer\u0022\u003EInternational Electron Devices Meeting\u003C\/a\u003E\u0026nbsp;(IEDM) in San Francisco this month.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EThe Quest for Voltage Efficiency\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe research focuses on improving NAND flash technology found at the core of storage devices like solid-state hard drives, USB sticks, and SD cards. NAND boasts an impressive 1,000-layer 3D architecture, cramming 100 terabytes of data into a minuscule space.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EHowever, the critical challenge is NAND\u2019s persistent high voltage requirements. Exceeding 20 volts poses challenges in computing due to increased energy consumption, heat generation, and the risk of damaging electronic components.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u201cNAND has been the backbone of data storage, so our research doesn\u0027t attempt to replace it; it\u0027s an upgrade. We\u0027re boosting NAND\u0027s power and pushing it into the digital storage future,\u201d said Das, who designed and executed experiments, as well as contributed to characterization.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EA Ferroelectric Future\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe paper\u2019s groundbreaking proposal aims to revolutionize NAND flash technology by replacing the traditional NAND gate stack \u2014 a multi-layered structure in a transistor essential for controlling the flow of electrical current in semiconductor devices \u2014 with a new ferroelectric structure and a tunneling barrier.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe team\u0027s method, introducing aluminum oxide (Al2O3) in the middle of the ferroelectric stack, has dramatically improved data storage capability, reducing voltage requirements by an impressive 40-60%.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAdditionally, the study reveals that the Al2O3\u0026nbsp;layer functions as a tunnel barrier, impeding electron motion and establishing a dipole, creating an additional electric field that aligns with the polarization direction, boosting device memory performance.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe experiential findings could transform various sectors, including AI, mobile devices, edge data processing, embedded systems, and overall computing efficiency.\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u201cThis breakthrough charts a new course towards more efficient, reliable and dense data storage solution,\u201d said Datta, who is the Joseph M. Pettit Chair of Advanced Computing in ECE and a Georgia Research Alliance (GRA) Eminent Scholar. \u201cWe are grateful to Samsung for their continued support, as we work towards the next milestone.\u201d\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ELooking for Collective Solutions to Shared Challenges\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAccording to Das, the approach not only demonstrates the capability to achieve reduced voltage and enhanced memory but also aligns with scalability and broad industry adoption.\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAs the project ventures into commercial avenues, the input of Samsung\u0027s researchers will be crucial. Das and Park are actively uncovering the intricacies of disturbances that could impede the market acceptance of the new gate stack.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EIn this context, disturbances refer to any unintended disruptions or deviations from transistor behavior expectations. Das stresses the importance of understanding, controlling, and clearly defining disturbance specifications. Establishing a well-defined threshold for disturbances is pivotal for achieving widespread commercialization readiness in their research.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u201cWorking alongside industry leaders like Samsung is essential for any endeavor aiming to make a transformative impact in everyday technology,\u201d added Khan. \u201cIt becomes particularly pertinent as we collectively look towards a future dominated by the power required to fuel advancements in AI.\u201d\u003Cbr \/\u003E\r\n\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cem\u003ECitation: Dipjyoti Das*, Hyeonwoo Park*, Zekai Wang, Chengyang Zhang, Prasanna Venkatesan Ravindran, Chinsung Park, Nashrah Afroze, Po-Kai Hsu, Mengkun Tian, Hang Chen, Winston Chern, Suhwan Lim, Kwangsoo Kim, Kijoon Kim, Wanki Kim, Daewon Ha; Shimeng Yu, Suman Datta, Asif Khan. \u201cExperimental Demonstration and Modeling of a Ferroelectric Gate Stack with a Tunnel Dielectric Insert for NAND Applications.\u201d Proceedings of the 2023 IEEE International Electron Devices Meeting (IEDM). Paper # 24.1\u003C\/em\u003E\u003C\/p\u003E\r\n","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EThe collaboration hopes to redefine digital storage, tackling the core of AI progress by reducing voltage in NAND flash technology through a new ferroelectric structure.\u003C\/p\u003E\r\n","format":"limited_html"}],"field_summary_sentence":[{"value":"The collaboration hopes to redefine digital storage, tackling the core of AI progress by reducing voltage in NAND flash technology through a new ferroelectric structure."}],"uid":"36172","created_gmt":"2023-12-11 19:23:44","changed_gmt":"2023-12-11 21:10:20","author":"dwatson71","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2023-12-11T00:00:00-05:00","iso_date":"2023-12-11T00:00:00-05:00","tz":"America\/New_York"},"extras":[],"hg_media":{"672548":{"id":"672548","type":"image","title":"NAND Fero_graphic.png","body":null,"created":"1702322328","gmt_created":"2023-12-11 19:18:48","changed":"1702322328","gmt_changed":"2023-12-11 19:18:48","alt":"stock art of computer memory","file":{"fid":"255802","name":"NAND Fero_graphic.png","image_path":"\/sites\/default\/files\/2023\/12\/11\/NAND%20Fero_graphic.png","image_full_path":"http:\/\/hg.gatech.edu\/\/sites\/default\/files\/2023\/12\/11\/NAND%20Fero_graphic.png","mime":"image\/png","size":974642,"path_740":"http:\/\/hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/2023\/12\/11\/NAND%20Fero_graphic.png?itok=Eq3y19F1"}}},"media_ids":["672548"],"groups":[{"id":"1255","name":"School of Electrical and Computer Engineering"}],"categories":[{"id":"153","name":"Computer Science\/Information Technology and Security"},{"id":"145","name":"Engineering"},{"id":"149","name":"Nanotechnology and Nanoscience"},{"id":"135","name":"Research"},{"id":"8862","name":"Student Research"}],"keywords":[{"id":"66891","name":"Georgia Tech School of Electrical and Computer Engineering"},{"id":"167680","name":"Samsung"},{"id":"178244","name":"Asif Khan"},{"id":"191062","name":"Suman Datta"},{"id":"178857","name":"Shimeng Yu"},{"id":"193345","name":"Dipjyoti Das"},{"id":"193346","name":"Hyeonwoo Park"},{"id":"193347","name":"Material Science Engineering"},{"id":"193348","name":"Institute of Materials"},{"id":"41411","name":"Institute of Electronics and Nanotechnology"},{"id":"193349","name":"digital storage"},{"id":"193350","name":"computer memory"},{"id":"13685","name":"ferroelectric"}],"core_research_areas":[{"id":"39451","name":"Electronics and Nanotechnology"}],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003EDan Watson\u003C\/p\u003E\r\n","format":"limited_html"}],"email":["dwatson@ece.gatech.edu"],"slides":[],"orientation":[],"userdata":""}}}