Committee: 

Dr. Lim, Advisor 

Dr. Krishna, Chair

Dr. Yu

Abstract: The objective of the proposed research is to perform both architectural and physical design scaling challenge exploration of near-memory and in-memory compute accelerators and address them through efficient multi-tier heterogeneous 3D integration. The preliminary research proposes 3D architectural and design scaling methodologies for compute-in-memory (CIM) accelerators and efficient EDA methodology to build high quality multi-tier 3D designs. The proposed research involves exploring in detail the architectural and physical design improvements that can be brought about in near-memory and in-memory compute accelerators through 3D integration using state-of-the-art accelerator benchmarks and evaluate them using state-of-the-art DNN workloads.