{"653191":{"#nid":"653191","#data":{"type":"event","title":"PhD Proposal by Sana Damani","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle: \u003C\/strong\u003EInstruction Reordering and Work Scheduling for Thread-Parallel Architectures\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ESana Damani\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EPh.D. Student\u003C\/p\u003E\r\n\r\n\u003Cp\u003ESchool of Computer Science\u0026nbsp;\u0026nbsp;\u0026nbsp;\u0026nbsp;\u0026nbsp;\u0026nbsp;\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EGeorgia Institute of Technology\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EDate:\u003C\/strong\u003E Wednesday, December 1, 2021\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ETime: \u003C\/strong\u003E11:00 AM - 1:00 PM EST\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ELocation\u003C\/strong\u003E(Remote via BlueJeans): \u003Ca href=\u0022https:\/\/gatech.bluejeans.com\/sdamani6\u0022\u003Ehttps:\/\/gatech.bluejeans.com\/sdamani6\u003C\/a\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ECommittee:\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Vivek Sarkar (Advisor), School of Computer Science, Georgia Institute of Technology\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Hyesoon Kim, School of Computer Science, Georgia Institute of Technology\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Tom Conte, School of Computer Science, Georgia Institute of Technology\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Santosh Pande, School of Computer Science, Georgia Institute of Technology\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EAbstract:\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EWhile accelerators such as GPUs and near-memory processors show significant performance improvements for applications with high data parallelism and regular memory accesses, they experience synchronization and memory access overheads in applications with irregular control flow and memory access patterns resulting in reduced efficiency. Examples include graph applications, Monte Carlo simulations, ray tracing applications, and sparse matrix computations. This proposal aims at identifying inefficiencies in executing irregular programs on thread-parallel architectures, and recommends compiler transformations and architecture enhancements to address these inefficiencies. In particular, we describe instruction reordering and thread scheduling techniques that avoid serialization, reduce pipeline stalls and minimize redundant thread migrations, thereby reducing overall program latency and improving processor utilization.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EContributions:\u003C\/p\u003E\r\n\r\n\u003Col\u003E\r\n\t\u003Cli\u003ECommon Subexpression Convergence, a compiler transformation that identifies and removes redundant code in divergent regions of GPU programs.\u003C\/li\u003E\r\n\t\u003Cli\u003ESpeculative Reconvergence, a compiler transformation that identifies new thread reconvergence points in divergent GPU programs to improve SIMT efficiency.\u003C\/li\u003E\r\n\t\u003Cli\u003ESubwarp Interleaving, an architecture feature that schedules threads at a subwarp granularity on GPUs to reduce pipeline stalls in divergent regions of the program.\u003C\/li\u003E\r\n\t\u003Cli\u003EMemory Access Scheduling, a software instruction scheduling approach that groups together co-located memory accesses to minimize thread migrations on migratory-thread architectures.\u003C\/li\u003E\r\n\u003C\/ol\u003E\r\n","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":"","field_summary_sentence":[{"value":"Instruction Reordering and Work Scheduling for Thread-Parallel Architectures"}],"uid":"27707","created_gmt":"2021-11-29 20:12:30","changed_gmt":"2021-11-29 20:12:30","author":"Tatianna Richardson","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2021-12-01T13:00:00-05:00","event_time_end":"2021-12-01T15:00:00-05:00","event_time_end_last":"2021-12-01T15:00:00-05:00","gmt_time_start":"2021-12-01 18:00:00","gmt_time_end":"2021-12-01 20:00:00","gmt_time_end_last":"2021-12-01 20:00:00","rrule":null,"timezone":"America\/New_York"},"extras":[],"groups":[{"id":"221981","name":"Graduate Studies"}],"categories":[],"keywords":[{"id":"102851","name":"Phd proposal"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78761","name":"Faculty\/Staff"},{"id":"78771","name":"Public"},{"id":"78751","name":"Undergraduate students"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}