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  <title><![CDATA[Ph.D. Dissertation Defense - Joe Gonzalez]]></title>
  <body><![CDATA[<p><strong>Title</strong><em>:&nbsp; </em><em>Heterogeneous Integration of Chiplets Using Socketed Platforms, Off-Chip Flexible Interconnects, and Self-Alignment Technologies</em></p>

<p><strong>Committee:</strong></p>

<p>Dr. Muhannad Bakir, ECE, Chair , Advisor</p>

<p>Dr. Oliver Brand, ECE</p>

<p>Dr. Hua Wang, ECE</p>

<p>Dr. Adilson Cardoso, GTRI</p>

<p>Dr. Suresh Sitaraman, ME</p>

<p><strong>Abstract:&nbsp;</strong>The heterogeneous integration of chiplets addresses many of the technical and logistical challenges associated with SoCs to meet the ever-increasing demands from a variety of emerging markets including IoT and mm-wave 5G. These integrated systems are conventionally permanently integrated/interconnected in a fixed configuration via either microbumps or other advanced off-chip interconnect technologies. However, some applications require the heterogeneity and fine-pitch provided by these multi-chiplet polylithic systems while also requiring a non-permanent or replaceable setup to meet a variety of needs or to enable a variety of applications: reworkability, testing, prototyping, upgradeability, etc. Furthermore, as systems integrate a growing number of chiplets, package/system yield can suffer considerably when in a permanent configuration; a replaceable setup can directly address this problem. To address the aforementioned challenges, this research presents novel, replaceable heterogeneously integrated systems using socketed platforms for different targeted applications. In general, such a system requires two enabling technologies: 1) a non-permanent off-chip interconnection system and 2) a non-permanent alignment technology. Hence, this research also introduces the design, fabrication, and characterization of off-chip flexible interconnects and mechanically-based self-alignment technologies.</p>
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