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  <title><![CDATA[Ph.D. Dissertation Defense - Xiaochen Peng]]></title>
  <body><![CDATA[<p><strong>Title</strong><em>:&nbsp; </em><em>Benchmark framework for 2-D/3-D integrated compute-in-memory based machine learning accelerator</em></p>

<p><strong>Committee:</strong></p>

<p>Dr. Shimeng Yu, ECE, Chair , Advisor</p>

<p>Dr. Sung-Kyu Lim, ECE</p>

<p>Dr. Saibal Mukhopadhyay, ECE</p>

<p>Dr. Muhannad Bakir, ECE</p>

<p>Dr. Michael Niemier, U of Notre Dame</p>

<p><strong>Abstract: </strong>Neural-inspired compute-in-memory (CIM) accelerators with emerging non-volatile memory (eNVM) devices such as resistive random access memory (RRAM) have been proven in silicon for deep learning acceleration. We proposed an end-to-end benchmark framework for the software and hardware evaluation of CIM accelerators with versatile device technologies called DNN+NeuroSim. The proposed framework can support both inference and training chip evaluation, with wide range of technology parameters, from 130nm down to 7nm. Furthermore, as the 3-D integration was proposed as a promising solution to support high bandwidth and on-chip storage for machine learning platforms, we proposed the 3D+NeuroSim with extend 3-D featured parameters and integrated thermal model, to evaluate the monolithic and heterogeneous 3-D integrated CIM accelerators. We have done comprehensive benchmarks across different 2-D and 3-D integrated CIM accelerators and versatile device technologies to explore various design options, and released the proposed frameworks as public tools for research community.</p>
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