Committee: 

Dr. Bakir, Advisor

Dr. Wang, Chair

Dr. Brand

Abstract: The objective of the proposed research is to demonstrate the interconnect performance of a novel polylithic integration technology using fused-silica stitch-chips for emerging RF/mm-wave and high-speed systems, such as 5G wireless application. The preliminary research demonstrated the electrical characterization of signal channels on the stitch-chips which are low-loss (less than 0.42 dB insertion loss and less than 12.7 dB return loss up to 40 GHz) with low parasitics. The future research focuses on alternative off-chip I/O design, fine-pitch I/O demonstration, and demonstration with active ICs.