Yu will be recognized at the 57th Design Automation Conference (DAC), which will be held July 20-24 in a virtual format. He and two other recipients of this award will participate at the award session being held virtually on July 24 at 5 pm during the DAC event at https://www.dac.com/. 

Yu is an associate professor in the Georgia Tech School of Electrical and Computer Engineering. He received the B.S. degree in microelectronics from Peking University in 2009 and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University in 2011 and 2013, respectively. From 2013 to 2018, he was an assistant professor at Arizona State University.

Yu’s research expertise is focused on the emerging non-volatile memories for applications such as deep learning accelerators, neuromorphic computing, monolithic 3D integration, and hardware security. His group has done pioneering work in the open-source DNN+NeuroSim framework development for machine learning hardware benchmarking. His publications are well recognized in the community, with more than 11,000 citations and an H-index of 53 by Google Scholar. 

Among Yu’s honors include the NSF Faculty Early CAREER Award in 2016, the IEEE Electron Devices Society (EDS) Early Career Award in 2017, the ACM Special Interests Group on Design Automation (SIGDA) Outstanding New Faculty Award in 2018, and the Semiconductor Research Corporation (SRC) Young Faculty Award in 2019. 

Yu is active in professional service. He served or is serving with many premier conferences on technical program committees, including the ACM/IEEE DAC, IEEE International Electron Devices Meeting (IEDM), IEEE Symposium on VLSI Technology, ACM/IEEE Design, Automation, & Test in Europe (DATE), and ACM/IEEE International Conference on Computer-Aided-Design (ICCAD). He is a senior member of the IEEE.

The ACM/IEEE Design Automation Conference is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, including system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers, and executives to researchers and academicians from leading universities.