{"618783":{"#nid":"618783","#data":{"type":"event","title":"Ph.D. Dissertation Defense - Bon Woong Ku","body":[{"value":"\u003Cp\u003E\u003Cstrong\u003ETitle\u003C\/strong\u003E\u003Cem\u003E:\u0026nbsp; \u003C\/em\u003E\u003Cem\u003EPhysical Design Solutions for 3D ICs and their Neuromorphic Applications\u003C\/em\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003ECommittee:\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Sung Kyu Lim, ECE, Chair , Advisor\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Saibal Mukhopadhyay, ECE\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Arijit Raychowdhury, ECE\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Tushar Krishna, ECE\u003C\/p\u003E\r\n\r\n\u003Cp\u003EDr. Hyesoon Kim, CoC\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EAbstract: \u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe wafer-level 3D integration including face-to-face (F2F) and monolithic 3D (M3D) technologies has been featured as a promising innovation to succeed the horizontal device scaling benefit in the looming end of Moore\u0026#39;s law. The objective of this research is two-fold: Firstly, to develop computer-aided-design (CAD) methodologies to address potential issues of the wafer-level 3D integration including power integrity, inter-tier variations, and cost overhead. Secondly, to evaluate the PPA benefits of the wafer-level 3D integration to the neuromorphic processor design at the full-chip level by applying proposed solutions. For the first part, the static power integrity issue of transistor-level M3D ICs is inspected in detail, and we address the issue by proposing a new layout scheme for transistor-level M3D standard cells. Next, physical design solutions for gate-level M3D ICs are developed to mitigate the negative impact of inter-tier device and interconnect variations, as well as the cost overhead issue. In addition, we present the unique physical design solution named Compact-2D flow, which produces commercial-quality gate-level F2F IC layouts. For the second part, we adopt the liquid-state-machine architecture, a model of recurrent spiking neural networks, to build an online machine-learning hardware platform, and study the PPA benefits of gate-level F2F and M3D ICs on the non-trivial real-world speech recognition application. This work serves as an important step towards realizing bio-inspired neuromorphic processors utilizing 3D IC design advantages.\u003C\/p\u003E\r\n","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":"","field_summary_sentence":[{"value":"Physical Design Solutions for 3D ICs and their Neuromorphic Applications "}],"uid":"28475","created_gmt":"2019-03-05 00:14:16","changed_gmt":"2019-03-05 00:15:16","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2019-03-14T10:30:00-04:00","event_time_end":"2019-03-14T12:30:00-04:00","event_time_end_last":"2019-03-14T12:30:00-04:00","gmt_time_start":"2019-03-14 14:30:00","gmt_time_end":"2019-03-14 16:30:00","gmt_time_end_last":"2019-03-14 16:30:00","rrule":null,"timezone":"America\/New_York"},"extras":[],"groups":[{"id":"434381","name":"ECE Ph.D. Dissertation Defenses"}],"categories":[],"keywords":[{"id":"100811","name":"Phd Defense"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}