“My research highly aligns with the scope of the fellowship on novel computing paradigms,” Noor said. “It will also help me to reach a broader audience by presenting my work at the CRNCH Summit.”

During the fellowship period, she will work on plasmonic computing system. Surface plasmon is an electromagnetic wave that merges the miniaturization potential of electron and high-speed attributes of photon. Researchers can use surface plasmon to design logic devices and integrated circuits that offer high-speed and high throughput computation with low footprint requirement. Plasmonic computing systems can be used in signal and data-processing applications in high-end server systems.

Noor’s project focuses on the design and optimization of the building blocks of a plasmonic computing network. As part of the project, she will design the couplers between plasmonic metal-insulator-metal (MIM) and metal-semiconductor-metal waveguides.

She will also explore the material choice for plasmonic MIM waveguide-based devices to determine best material factoring in energy efficiency, footprint, and speed.

CRNCH launched the fellowship program in fall of 2020 to support innovative student research in post-Moore computing topics. The research center explores new computing paradigms after the end of Moore’s law.  Partnering with academics and industry, CRNCH researchers full-stack solutions on everything from quantum computing to approximate computation.

“It is a great honor to receive this award,” Qureshi said. “I have always enjoyed collaborating with Intel, right from my younger days of summer internships till now. Intel has a great set of researchers and you get feedback that keeps the research practical and useful.”

Qureshi was recognized for designing efficient and robust hybrid memory architectures. These memory systems combine conventional DRAM memory modules with emerging memory technologies such as non-volatile memory (NVM) and high-bandwidth memory (HBM).

In hybrid memory systems, placement of data can determine performance and energy efficiency. Ideally, frequently accessed data is placed in the low-latency high-bandwidth memory, and the remaining data in high-capacity low-cost memory.

Qureshi’s group has developed innovative designs such as Alloy Cache, which outperforms combines the tag and data together to do the cache lookup in a single access and outperforms most designs.

His group has also developed low-cost set-associative DRAM caches (called ACCORD), which maintain the low-latency of direct-mapped caches while providing conflict-miss reduction of set-associative caches. His group is currently investigating low-cost compression designs that are suitable for large giga-scale memory systems while limiting the performance degradation from metadata lookups.

Intel has supported Qureshi’s group for developing hybrid memory designs for more than five years. This research has produced several publications at flagship architecture conferences, such as the International Symposium on Computer Architecture (ISCA) and International Symposium on Microarchitecture. The grant has supported the Ph.D. dissertations of three graduate students.

“Intel is one of the few companies that has an accessible funding model focused on fostering academic research,” Qureshi said. “I am thankful to Intel for the continued support and look forward to the collaboration.”

This is Qureshi’s second Intel award. He first won the inaugural Intel Early Career Faculty Honor Award in 2012.

Qureshi leads the Memory Systems Lab at Georgia Tech. His research group looks at a variety of topics ranging from quantum computing to hardware security to robust artificial intelligence algorithms to designing future memory systems.

The fellowship awards partial funding for four Ph.D. students working on novel research topics that fit in with CRNCH’s mission of post-Moore software and hardware designs. Fellows are required to create a poster and paper during their term, and also present at the annual CRNCH Summit in January of each year. This gives them the opportunity prepare for publication and the job market.

CRNCH is a research center that focuses on exploring new computing paradigms after the end of Moore’s law, sometimes called the post-Moore’s era. The center partners with academics and industry to explore full-stack solutions on everything from quantum computing to approximate computation.

Applications for the spring CRNCH fellowship are due Dec. 18, 2020.

Meet the fellows:

Dingtian Zhang
School: School of Interactive Computing
Advisor: Professor Gregory Abowd

Why did you apply for the CRNCH fellowship? 
I am developing computational materials that can weave into the fabric of everyday objects. My work falls under the categories of analog computing, computing based on novel device physics and materials, and optical computing, which is in line with the interest of CRNCH.

What project will you be working on during the fellowship?
We are particularly interested in developing large-scaled sensing systems that can perform light-based sensing on the surfaces of everyday objects to detect implicit and explicit human activities. Such systems need to be self-sustained and easy to maintain, cost effective to scale, conformal to everyday objects, and protective of user privacy. Conventional vision systems based on cameras struggle to keep up with the ubiquitous deployment on these dimensions.

We are developing computational photodetectors that not only sense, but also process the signal in the analog domain to extract mid-level vision features, reducing the inherent complexity and latency from digital signal acquisition and computing. This does not only make the system low-power and scalable, but also prevents capturing unwanted information from images. We adopt emerging organic semiconductor (OSC) devices in fabricating computational photodetectors with lightweight, thin, flexible, and conformal form factors. Computational photodetectors will enable a wide range of large-scale applications such as smart environment, health monitoring, asset tracking, and activity recognition.

Muliang Zhu
School: School of Electrical and Computer Engineering
Advisor: Professor Ali Adibi

Why did you apply for the CRNCH fellowship?
Being part of a larger community that focuses on new frontiers of computing technology is a great benefit for all people like me in the optical computing area. Because of this, I applied for the fellowship to bring the concept of computing using ultracompact photonic devices to CRNCH.

What project will you be working on during the fellowship?
I will be working on nanostructure optical parametric oscillators (OPOs) for nonlinear control of light at the subwavelength scale, aiming at using photonics for neural-network-type computing. The main part of the project I am currently focusing on is the development of nonlinear meta-structure that can provide the optical nonlinearity that is needed for the development of any brain-inspired computing.

Chunxing Yin
School: School of Computational Science and Engineering
Advisor: Professor Rich Vuduc

Why did you apply for the CRNCH fellowship?
My research focuses on neural networks compression using tensorization, which offers a systematic way to trade-off storage, execution time, and accuracy with respect to the capabilities of a given hardware platform. My advisor and I believe that this work fits well within CRNCH and would benefit from feedback from the CRNCH community, so we applied for this fellowship.

What project will you be working on during the fellowship?
We propose to evaluate to what extent convolutional layers and embedding layers of recommender systems can be trained in a reduced form using the techniques of low-rank tensor train decomposition.

Recent studies have shown an alarming growth in the environmental burden from AI, for example the number of parameters in state-of-the-art language models increased to over 175 billion for OpenAI’s GPT-3. To significantly reduce the environmental footprint of AI, we need order-of-magnitude reduction in the infrastructure demand while maintaining or even outperforming state-of-the-art model accuracy. We are exploring a new algorithmic approach, tensor train decomposition, to cope with the large memory requirement of DNNs. The core idea is to replace large weight tensors with a sequence of small tensor decompositions that trades of memory storage with computation. Initially, we will study the compressed networks in the context of heterogeneous CPU-GPU architectures. But we believe that our results will help guide engineering co-design of future hardware-software systems for neural networks.

Now as its new chair, Sarkar wants to increase the scale of the school’s research leadership.

“Georgia Tech is a place where we can do big things at scale, make big bets, and be very supportive of our colleagues,” he said of taking on the role.

Finding a future in post-Moore

Sarkar started his career in parallel computing at IBM, but he saw new potential with the end of Moore’s law — the expectation that transistors double annualy in a commodity semiconductor chip.

“The entire computing ecosystem that we have right now in the cloud is predicated on rich system software stacks contributed to by worldwide open-source communities,” he said. “As hardware gets more complicated, a primary concern is that it becomes harder to program in ways that are only accessible to a small number of people with advanced degrees.”

While at Rice University, he created his research group, the Habanero Extreme Scale Research Laboratory, to develop an entire software stack for the new post-Moore world of heterogeneous hardware. Now, at Georgia Tech, the Habanero lab includes five research faculty members and 11 Ph.D. students.

Partnering with faculty in this area was vital for his research into software for future hardware, and what attracted Sarkar to the College.

“One of my big draws for coming to Georgia Tech was having colleagues who are world experts in post-Moore computing,” he said. “Tom Conte’s creation of the Center for Research into Novel Computing Hierarchies (CRNCH) provided a great framework for my research group when I arrived.”

It didn’t take long for Sarkar to participate in multiple collaborative research efforts on campus. Conte invited Sarkar to become the co-director of CRNCH to help broaden the center’s research scope. Sarkar also led a Defense Advanced Research Projects Agency (DARPA) $4.5 million project on software-defined hardware with Conte and Professor Richard Vuduc at Georgia Tech, and other faculty at University of Illinois, University of Michigan, and University of Southern California.

He has other research collaborations under way with fellow SCS faculty: Assistant Professor David Devecsery, Associate Professor Taesoo Kim, Senior Research Scientist Jeffrey Young, and Assistant Professor Qirun Zhang, as well as a the School of Electrical and Computer Engineering Assistant Professor Tushar Krishna.

[Related Content: College of Computing Professors Receive DARPA Contract Award to Improve Software and Hardware Co-optimization]

Serving the community

Yet service is just as important to Sarkar as research. He has always served both the global and local computing community.

“When you are part of a community, it’s great to be able to contribute in every way you can,” he said.

Sarkar is on the Computing Research Association’s Board of Directors and the U.S. Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC). He is also an Association of Computing Machinery Fellow and was recently named an IEEE fellow.

Yet as the Stephen P. Fleming Chair in Telecommunications, the service he does within the school and College has been just as important to him. In 2018, he served on the school’s Faculty Recruiting Committee and chaired it in 2019. He also was chair of the School Advisory Committee and a member of dean’s search committee.

Becoming chair of SCS is another form of service for him.

“Service is leadership, and leadership is service — it’s integral to what we do as professors,” he said.

As a leader of SCS, Sarkar wants to bring the same collaborative spirit he’s found throughout the College.

“One of my goals is to really boost our leadership in the core areas that our school contributes to the college that span architecture, databases, networking, programming languages, software engineering, systems, and theory,” he said.

“I’m really keen to figure out how we can integrate research areas where appropriate to put together some really amazing and unique demonstrations of what can be done at Georgia Tech,” he said.  “We’ve hired eight junior faculty members in the last three years who span all these core areas, and have added a new level of energy to the school.”

Watch the interview:

https://youtu.be/_TB_xhl1Grs

The Kennedy Award was established in 2009 to recognize substantial contributions to programmability and productivity in computing and significant community service or mentoring contributions.

"I am delighted to receive this year’s Kennedy Award," Sarkar said. "I have always believed that research and mentoring go hand in hand, and it is an honor to be recognized for my work in these areas.  The award is also meaningful because of the influence that Ken had on my career."

[RELATED: Sarkar Named as School of Computer Science Chair]

Sarkar began his career in IBM Research in 1987 after obtaining his Ph.D. from Stanford University supervised by John Hennessy. His research projects at IBM include the PTRAN automatic parallelization system led by Fran Allen, the ASTI optimizer for IBM’s XL Fortran product compilers, the open-source Jikes Research Virtual Machine for the Java language, and the X10 programming language developed in the DARPA HPCS program. He was a member of the IBM Academy of Technology from 1995 to 2007.

“Vivek is not just a leader in research, but also a generous teacher and mentor, which is to say he is a role model for our community,” said Charles Isbell, dean of the College of Computing and John P. Imlay, Jr. chair.

Since moving to academia, Sarkar has mentored more than 30 Ph.D. students and postdoctoral researchers in the Habanero Extreme Scale Software Research Laboratory, first at Rice University and then at Georgia Tech. While at Rice, Sarkar was the E.D. Butcher Chair in Engineering, served as Chair of the Department of Computer Science.

The Kennedy Award recognizes Sarkar’s leadership in several areas including foundational technical contributions to programmability and productivity. Sarkar has developed innovative programming-model, compiler, and runtime technologies for parallel computing that have influenced other researchers, as well as industry products and standards. Researchers in his lab have developed the Habanero-C/C++ and Habanero-Java programming systems for parallel, heterogeneous, and distributed platforms. These systems introduced new constructs for homogeneous and heterogeneous intra-node parallelism, as well as their integration with scalable inter-node communication libraries.

Sarkar has led open-source software projects that have had a significant impact on the research community: he has created new pedagogic materials to make parallel programming more accessible to undergraduate students and the Coursera learner community and has mentored junior colleagues at IBM and several Ph.D. students after moving to academia.

Sarkar has also demonstrated leadership in community service by serving as program chair and general chair for major conferences in his research area, serving on U.S. Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC) advisory committee since 2009, and on the Computing Research Association (CRA) Board of Directors since 2015.

The Kennedy Award carries a U.S. $5,000 honorarium endowed by the IEEE CS and the ACM, which Sarkar plans to donate to Georgia Tech’s Constellations Center for Equity in Computing.

“Vivek is not just a leader in research, but also a generous teacher and mentor, which is to say he is a role model for our community,” said Charles Isbell, dean of the College of Computing and John P. Imlay, Jr. chair. “We are lucky to have him as a leader.”

"It is an honor to become an IEEE fellow, and always a great feeling to be recognized by one's colleagues," said Sarkar, who is the Stephen Fleming Chair for Telecommunication in the College of Computing and co-director of the Center for Research into Novel Computing Hierarchies (CRNCH).

As the world’s leading professional association for advancing technology for humanity, this IEEE distinction is considered to be a prestigious honor and an important career achievement in the technical community. This year the IEEE Board of Directors honored three GT faculty members: Sarkar, School of Computational Science and Engineering Professor Richard Fujimoto, and School of Electrical and Computer Engineering (ECE) Professor Stanislav Emelianov.

[RELATED NEWS: Fujimoto and Sarkar Named IEEE Fellows]

Sarkar was recognized for contributions to high-performance computing compiler technologies. As a parallel computing expert, Sarkar’s work includes programming languages, compilers, runtime systems, and debugging and verification systems for high performance computers.

This is not Sarkar’s first honor in his field. He became a member of the IBM Academy of Technology in 1995 and an Association of Computing Machinery (ACM) Fellow in 2008. He has been serving as a member of the U.S. Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC) since 2009 and has served on Computing Research Association’s Board of Directors since 2015. 

Sarkar is the sixth IEEE fellow in SCS. He joins Interim Chair Mostafa Ammar, CRNCH Co-Director Tom Conte, Professors Ling Liu, Umakishore Ramachandran, and Ellen Zegura.

"In many ways, the synergies between ACM and IEEE is reflected in the synergies between the College of Computing and the School of Electrical and Computer Engineering at Georgia Tech, and can be seen in multiple close research collaborations on campus including in our CRNCH center,” said Sarkar.

This annual gathering has become one of the top forums to discuss the future of computing after Moore’s law, the past industry-wide trend of doubling transistors in a microchip nearly every two years that exponentially fueled computing innovation. Now dozens of experts will meet to discuss computing’s new frontier from the perspective of diverse areas including devices, edge computing, computer architecture, systems software, machine learning, quantum computing, and theory.

“The CRNCH Summit is an exciting opportunity for Georgia Tech researchers and our visitors to share their latest breakthrough ideas for post-Moore computing,” said CRNCH Co-Director Vivek Sarkar.  “We look forward to a productive meeting, and all the great research that will follow.”

This year’s keynote is on computer architecture by David Mountain, the senior technical director at Advanced Computing Systems Research Program. Other leaders in their field follow, including Oak Ridge National Laboratory AI Institute Director David Womble, Notre Dame Professor Peter Kogge, National Instruments Academic Business Development Manager Igor Alvarado, Northrop Grumman System Architect Brian Konigsburg, and GTRI Quantum Systems Division Senior Research Scientist Craig Clark.

The event is also a chance for Georgia Tech faculty to showcase their research. School of Computer Science (SCS) Associate Professor Ada Gavrilovska discusses edge computing possibilities. SCS Professor Dana Randall offers emergent computation as a possibility. SCS Associate Professor Hyesoon Kim presents heterogeneous computing systems. School of Electrical and Computer Engineering Professors Arijit Raychowdhury and Moin Qureshi bring their perspectives on future devices and quantum computers.

The event highlights how CRNCH’s influence spans the entire institute with more than 30 dedicated faculty members from the College of Computing, the College of Engineering, the College of Sciences, and the Georgia Tech Research Institute. With their expertise in quantum computing, neuromorphic computing, design science, approximate computing, and more, CRNCH’s team is uniquely qualified to tackle the challenges of computing’s future. Since it was founded in 2017 by Co-director Tom Conte, the center has paired researchers with funding, students with internships, companies with research labs on campus to test their leading-edge products, and even started a collection of specialized hardware called the Rogues Gallery (RG).

The RG has supported close to 75 users with a quarter coming from external labs and institutions. In 2019, co-directors Jason Riedy and Jeff Young also ran external tutorials at the ASPLOS and PEARC conferences and presented RG-related work at multiple venues including SIAM CSE, PEARC, and ICRC. Looking forward, Young expects more challenging projects.

 “In 2020, the Rogues Gallery will see the deployment of additional hardware focused on Arm high-performance computing as well as new neuromorphic prototypes and support for quantum programming” he said. “We’re looking to support a more diverse set of research hardware as well as a more inclusive userbase to tackle the toughest challenges in post-Moore computing”.

OpenMP Sanitizer (OMPSan) is a sanitizing tool that uses an advanced data flow analysis to determine the correctness of data mapping in OpenMP programs. It then reports diagnostics to help the developer understand and debug their data mapping specifications across heterogeneous devices.

The tool saves developers considerable effort and time. OMPSan found 15 errors in a common data race benchmark for accelerators. The tool has already been used in hackathons for application developers to try the latest OpenMP standard.

OpenMP Challenges for Heterogeneous Computing

This research is an important contribution to the burgeoning challenges of programming heterogeneous accelerators, according to School of Computer Science (SCS) Professor Vivek Sarkar, Stephen Fleming Chair for Telecommunications, and Co-Director for the Center for Research into Novel Computing Hierarchies (CRNCH).

“Heterogeneous computing is increasing in importance as we approach the end of Moore’s law, and there is a growing need for productive and portable approaches to programming computers with accelerators,” he said. “While the OpenMP standard offers a possible solution to the programming problem, the community appreciates that there are many challenges in using this standard and that OMPSan can help developers in using OpenMP’s new data mapping constructs.”

A key challenge in data mapping is managing the data movement to and from accelerators like graphic processing units (GPUs). Buggy data mappings can lead to incorrect data being used in the GPU, thereby resulting in erroneous outputs. Identifying and fixing these bugs requires considerable effort by the developer.

OMPSan Improvements

OMPSan is implemented in the LLVM tool chain and is comprised of several advancements that could have implications beyond the current version of the tool:

• an algorithm to analyze OpenMP runtime library calls
• a dataflow analysis to infer relationships between CPU and GPU memories
• a static analysis technique that compares dataflow information between sequential and parallel versions of the same OpenMP program
• diagnostic information for developers to understand mapping errors

Although OMPSan provides great strides in this area, Sarkar’s lab hopes to create a follow-on dynamic tool that can find more bugs and even fix them on the fly.

The research won a best paper award at the 2019 International Workshop on OpenMP (IWOMP). SCS Ph.D. student Prithayan Barua, Research Scientist Jun Shirako, and Sarkar authored the paper, OMPSan: Static Verification of OpenMP’s Data Mapping Constructs, along with IBM developers Whitney Tsang,  Jeeva Paudel, and Wang Chen.

 “I am delighted to see this positive recognition of the OMPSan research led by Prithayan and of the great team effort with our IBM collaborators,” Sarkar said.

“We call it Rising Stars because we want to take the opportunity to learn about research from the top architecture students and give you advice on how to succeed in academia,” said School of Computer Science (SCS) Assistant Professor Alexandros Daglis, who co-chaired the event with School of Electrical and Computer Engineering (ECE) Assistant Professor Tushar Krishna.

The workshop was co-hosted by SCS and ECE with faculty chairs providing welcomes and explaining why Tech is such a hotbed of promising computer architecture research.

“Innovation is in the DNA of everyone at Georgia Tech,” said SCS Interim Chair Mostafa Ammar. “We’re never resting on anything. We do celebrate our achievement, but we’re always looking to improve.”

ECE Associate Chair for Research Justin Romberg also credited Tech’s influence with its location.

“We’re nestled here right in the heart of Midtown Atlanta, the economic capital of the South,” he said. “The city has dumped a lot of resources into things like startup incubators, and there is a budding culture of entrepreneurship here, too.”

Yet the focus of the day was student research. Students from four top-ranked universities — including University of Illinois, Urbana-Champaign and Princeton — came to give talks on cutting-edge computer architecture research like security and computing in the post-Moore era. More than 20 Georgia Tech faculty and students provided suggestions on how the students could make their research more accessible to stand out in the academic job market.

The workshop also offered a candid faculty panel on what life in academia is like, from interviewing for jobs to various faculty duties. The four panelists were SCS Assistant Professor SCS Assistant Professor Paul Pearce, SCS Professor Vivek Sarkar, ECE Associate Professor Alenka Zajic, and ECE Professor Arijit Raychowdhury.

Pearce gave tips on how to apply for teaching positions strategically.

“You will need to be your own advocate, but you will need to find people who can be your advocate and let you know which schools might be the best fit for you or who they know there,” he said.

Sarkar spoke about how to pick the right department to join.

“Think about the research problem you want to work on and where to find the best people to collaborate with,” he said.

Student participants found the event useful for getting ahead on the job search.

“I learned a lot from your feedback and from interacting with everyone at the workshop, and I think it is a great initiative and effort from Georgia Tech,” said Gokul Ravi, a student from University of Wisconsin-Madison.

MICRO, located in Columbus, Ohio, from October 12 to 16, focuses on the most pressing computer architecture challenges, such as quantum computing, memory, machine learning, and security.

“MICRO is one of the top-tier conferences in computer architecture,” said Assistant Professor Alexandros Daglis. “Our number of papers is quite impressive and shows Georgia Tech’s strength in the field.”

Faculty and students in the Schools of Computer Science and Electrical and Computer Engineering and Center for Research into Novel Computing Hierarchies (CRNCH) collaborated on the papers, including:

Distributed Logless Atomic Durability with Persistent Memory Siddharth Gupta (EPFL), Alexandros Daglis (Georgia Tech), and Babak Falsafi (EPFL)

EMMA: Hardware/Software Attestation Framework for Embedded Systems using Electromagnetic Signals Nader Sehatbakhsh, Alireza Nazari, Haider Khan, Alenka Zajic, Milos Prvulovic (Georgia Tech)

Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach Vivek Sarkar, Tushar Krishna, Hyoukjun Kwon, and Prasanth Chatarasi (Georgia Tech); Michael Pellauer (Nvidia); Angshuman Parashar (NVIDIA)

CleanupSpec: An "Undo" Approach to Safe Speculation Gururaj Saileshwar and Moinuddin Qureshi (Georgia Tech)

SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution Tushar Krishna and Mayank Parasar (Georgia Tech); Joshua San Miguel (University of Wisconsin-Madison); Paul Gratz (Texas A&M University); Natalie Enright Jerger (University of Toronto)

Ensemble of Diverse Mappings: Improving Reliability of Quantum Computers by Orchestrating Dissimilar Mistakes Swamit Tannu and Moinuddin Qureshi (Georgia Tech)

A Case for Multi-Programming Quantum Computers Poulami Das, Swamit Tannu, and Moinuddin Qureshi (Georgia Tech); Prashant J. Nair (The University of British Columbia)

Mitigating Measurement Errors in Quantum Computers by Exploiting State-Dependent Bias Swamit Tannu and Moinuddin Qureshi (Georgia Tech)

Centering on computing trends and disruptive technology, the summit enabled researchers, academics, and industry partners to meet and discuss their work, latest research advances, and collaboration opportunities. CRNCH researchers showcased work in architecture, tools, benchmarking, and applications for an audience working on the edge of low-power and high-performance chip designs.

"We were thrilled to see that Georgia Tech researchers were so well represented in panels on graph analytics and post-Moore and high-performance computing, as well in demo sessions and peer-reviewed talks,” said School of Computer Science Senior Research Scientist Jeffrey Young. “CRNCH has provided a great collaborative opportunity for Georgia Tech students and faculty to influence and create the next high-performance systems with industry collaborators like Arm."

CRNCH faculty participated in all areas of the summit:

Talks:

• Enabling Continuous Learning through Neural Network Evolution in Hardware, School of Electrical and Computer Engineering Assistant Professor Tushar Krishna
   
• Strider: Architectures for Scalable Memory Centric Reduction of Sparse Data Streams, School of Computer Science (SCS) Ph.D. student Sriseshan Srikanth
   
• Using the Spatter Benchmark Suite to Evaluate SVE Support for Gather/Scatter, School of Computational Science and Engineering (CSE) Ph.D. student Patrick Lavin
   
• Scaling Full-system Simulation of ARM SVE Processors Using Compilers and Runtime Tool APIs, ORNL Matthew Baker and Jeffrey Young
   
• Using ARMIE for HPC Codesign and Benchmarking, Jeffrey Young 
   
• Specializing Architectures for Data Analytics, TCL’s David Donofrio and CSE Senior Research Scientist Jason Riedy

Panels:

Rethinking Boundaries through Hardware-Software Co-design for Productive Post-Moore Computing, CRNCH Co-Director Tom Conte, University of Virginia’s Samira Khan, RedHat’s Jon Masters, and the University of Texas at Austin’s Yale Patt

Birds of a Feather (BoF) on High Performance Graph Analytics: Algorithms, Programming, Architecture, Tactical Computing Labs’ David Donofrio, PNNL’s Marco Minutoli, Jason Riedy

Not to worry. We're here to catch you up on all the big stories you may have missed.

“I didn’t want to go anywhere else,” he said. He had grown up in Atlanta, graduating from Mays High School, and he loved the city. More than that, he already knew that he wanted to work with computers, and he knew Georgia Tech was one of the best places in the world to do so.

When he got to campus, he knew right away that he had made a good decision.

“I always felt I belonged at Georgia Tech,” Isbell said. “No, I didn’t join a frat, I wasn’t part of any of the big clubs,” he said. “Hey, I went to zero parties. Zero. But I did build friendships. I built connections.” He also, in a nice bit of symmetry, served as the undergraduate representative on the committee that hired Peter Freeman to be the first dean of the brand new College of Computing.

Today, Charles Isbell becomes the John P. Imlay Jr. Dean of Computing. He is the fourth person to hold the position. His philosophy as dean is built on the foundation he laid long ago as an undergraduate.

“To me, it’s all about community,” he said. “I want people to feel like they belong, and that the community reflects their experiences. I want people to feel that the things they’re learning apply to their worlds.”

Machines Bringing People Together

Isbell went to MIT after graduating from Georgia Tech, and after that spent four years working at AT&T Labs. During that time, he continued to pursue his interests in computing and human connection.

The first project that earned Isbell a “best paper” award was his work on Cobot, a software agent whose goal was to become a functioning member of an online social community called LambdaMOO.

“I’m interested in how humans express themselves in a way that computers can understand – from a technical, machine learning point of view, that is,” Isbell said.

He also found new ways to use technology to serve existing real-life communities. At MIT, he built what was most likely the first-ever online Black history database. He ran a website for hip-hop reviews.

To this day, he continues to mix his cultural experience and computing. All of his graduating students pose for photos dressed like members of the funk band Parliament in a silver top-hat, star-shaped sunglasses, and strings of Mardi Gras beads. The framed and funky photos line the walls of his office.

Isbell says that combining his passions keeps him engaged and that he likes to see others do the same.

“If you’re passionate, people pick up on that passion,” he said.

“The technology we develop is transformative, and we have to reckon with that. We have to accept our responsibility as leaders and our responsibility to bring other people along for this ride.”

Charles Isbell, John P. Imlay Jr. Dean of Computing

Giving Back

In 2002, Isbell was hired as a junior faculty member in the College of Computing and moved back to Atlanta.

“First thing that happened when I came back, my mother made me a bowl of cheese grits and bacon,” he said. “I knew I was back home.”

At the Institute, things were more complicated.

“It was so exciting to be back, but the place was completely different,” he said. It was bigger, a stronger program with a ballooning reputation. “Still, I always felt I could build something here.”

After earning tenure, Isbell dived into administrative work to do exactly that. He was one of the architects of the college’s award-winning Threads curriculum, and also of its groundbreaking Online Master’s of Science in Computer Science (OMSCS) program.

“I just kept volunteering,” he said. “Then one day I woke up as dean.”

Redefining the Field

He didn’t, of course. Wake up as dean, that is. Isbell won the job in a grueling nationwide search. He is the first internal candidate ever to be named as the dean of the College of Computing.

And as someone who has been in or around the college for decades, he has a unique view on its development. When Isbell arrived as an undergraduate, computing was still in its infancy at Georgia Tech — it wasn’t even a college yet.

Through his tenure on the faculty, he has seen the college grow and mature. Now, he says, the college is truly entering adulthood, a top-10 program with responsibilities not only to its faculty, staff, and students but also to the larger world.

“The technology we develop is transformative, and we have to reckon with that,” he said. “We have to accept our responsibility as leaders and our responsibility to bring other people along for this ride.”

As dean, he intends to build on the hard work of his predecessors in confronting the challenges of a field that is always changing and always short of labor. And as computing metastasizes into other fields – finance, health, media, politics, art — he sees social and ethical considerations becoming ever more important.

The good news is that the College of Computing is already addressing these problems, Isbell said. OMSCS has diversified and significantly increased the pipeline of trained talent to industry. Our Constellations Center for Equity in Computing is piloting a hybrid classroom-online model that holds the promise of making computer science education available to all children. The college has made ground-breaking commitments to not only teach ethics to the students, but to computing research that prioritizes transparency and the public good.

In other words, Isbell wants Georgia Tech to lead a re-thinking of the nature and importance of community in the field of computing.

“It seems increasingly clear that computer scientists need to think more clearly about the impact of their work on society as a whole,” Isbell said. “That’s going to require the involvement of everyone who is affected — which is to say, everyone.”

Two research scientists in the School of Computer Science (SCS) have been promoted. Pak Ho (Simon) Chung  is now a research scientist II, and Jeffrey Young became a senior research scientist.

“These promotions recognize the critical roles Simon and Jeff play in the school’s research in computer security, systems, and architecture,” SCS Chair Lance Fortnow said.

Chung joined SCS in August 2011 as a postdoctoral fellow. He is  known for his cybersecurity expertise in Android attacks. In 2017, his research team discovered a highly practical Android attack called Cloak and Dagger, an app that controls a user interface loop and takes over the device.

“The promotion is a very welcomed acknowledgment and encourages me to be more active in shaping our research direction at the stage of writing funding proposals,” Chung said.

After completing his Ph.D. in Electrical and Computer Engineering, Young became a research scientist II in SCS focusing on accelerator scheduling and data movement, and modeling and mapping algorithms to high-performance architectures. Young has also been an active member in SCS’s Center for Research into Novel Computing Hierarchies (CRNCH), where he co-leads the Rogues Gallery of unique hardware.

“Over the next few years, I look forward to continuing my work with graduate students in the areas of high performance computing, novel architectures, and algorithms,” Young said. “I also hope to continue extending our development of the Rogues Gallery testbed and related Vertically Integrated Projects (VIP) class for undergraduate students.”

Galil’s deanship was marked by accomplishments on many fronts. Under his leadership the College has risen into the top eight nationally, top seven internationally – the only top 10 computer science program to rise either in rank or in score in the last ranking (2018).

In a measure of the College’s public perception, applications to the College have grown ten-fold, and enrollment in on-campus degree programs has nearly doubled during Galil’s tenure as dean. Computing is now the largest major at the university, and the most selective – our majors average higher than 1500 on the SATs.

[RELATED: College of Computing Rises to No. 8 in U.S. News Rankings]

The College’s reputation among employers and alumni has seen dramatic enhancement, as well. As a result, the College's career fairs and its corporate affiliates program have grown in stature in recent years. The GT Computing Career Fair regularly sets new attendance records with more than 160 companies participating (with nearly 20 companies waitlisted) this year in the Klaus Building Atrium. Several hundred students from across campus attended each day of the four-day event.

“Being a dean is about community building, about involvement, support, and empowerment. You’re closer to students, you’re closer to staff and faculty. I view my role as dean as working to inspire our community by helping them to connect, encouraging them to excel, increasing their confidence.” - Zvi Galil

More and more companies are also participating in the College's corporate affiliates program (CAP). During Galil's tenure as dean, CAP grew from 14 companies generating $280,000 in membership fees in 2010, to 63 companies raising $1.13 million in the current academic year. Galil exceeded the annual campus fundraising campaign goal by 40 percent – the largest percentage above the goal of any unit at Georgia Tech. Alumnus James Liang's gift of $1.5 million for an endowed chair was at the time the largest international gift in Georgia Tech history, and the only endowed chair by an international donor.

The successful fundraising provided the resources for continued investment in the College and its faculty, and also helped fund four Interdisciplinary Research Institutes and four Interdisciplinary Research Centers led by the College. Galil doubled the number of endowed senior faculty chairs to 10, in addition to four new junior faculty chairs. Faculty rose from 85 to 102, with six or more to join later this year.

[RELATED: Corporate Affiliates Program Paying Off for GT Computing Students]

It is a testament to the values and productivity of the College’s faculty that, with just 8 percent of Georgia Tech faculty, GT Computing teaches about 18 percent of the Institute’s credit hours (about 13 percent of undergraduate and about 24 percent of graduate credit hours).

“Under Zvi’s leadership the standing of the college has improved along a host of traditional metrics – but truly great universities are in the center of the important issues of the day,” said Executive Associate Dean Charles Isbell, who will take over as dean on July 1. “Through OMSCS, Zvi has led the way in moving the college to the center of perhaps the most important of national discussions: the role of affordability and access in computing. That is a transformative accomplishment.”

OMSCS

Creating the College’s now-famous Online Masters of Science in Computer Science (OMSCS) program took years of labor from dozens of faculty and staff members. Galil’s vision was the driving force behind the entire project, however, and guided many of the decisions that make the program so distinctive.

One of the most significant was OMSCS’ unique admissions policy. Instead of admitting only a few of the highest-achieving applicants, Galil insisted that the program be open to anyone who had met the requirements. Those online students have been just as successful as the on-campus students admitted through a much more selective process.

Now, five years after its founding, the online master’s has nearly 9,000 students and an international reputation for changing the game in online education. The OMSCS program embodies Georgia Tech's motto of Progress and Service with its unique combination of prestige, accessibility, and affordability. Its launch has changed national and international perspectives on Georgia Tech.

[RELATED: Juggling Careers, Grad School, Kids: One Family’s Story of How They Make OMSCS Work]

“OMSCS offers wider access to the high quality of our residential program at a substantially lower cost. It helps realign today’s workforce with the requirements of a thriving 21st-century economy. This is a fundamental, revolutionary shift from the prevailing paradigm of higher education, in which a brand is bolstered by exclusion and high tuition fees,” Galil said.

Building a community

“Being a dean is about community building, about involvement, support, and empowerment,” Galil said. “You’re closer to students, you’re closer to staff and faculty. I view my role as dean as working to inspire our community by helping them to connect, encouraging them to excel, increasing their confidence.”

Galil has made particular efforts to integrate staff members into the community – through regular meetings and an annual staff retreat – and is well known for matching high standards with a collaborative approach and approachability.

“Zvi pushes for excellence in a way that stretches everyone,” said Alan Katz, assistant dean for finances and administration. “He believes in sharing information, serving others, and providing incentives – he’s a carrot person, not a stick person.”

“You would never know Zvi has such a high status because he’s so down to earth,” said Pam Ruffin, director of human resources for the college. “You can walk up to his door and he’ll take time to talk to you.”

Even those who don’t make it to his office hear from Galil regularly, through a steady stream of e-mails he sends out to the entire GT Computing community. Although he is known as “the e-mail dean,” he almost never mentions himself in his missives. “I love to brag about the achievements of faculty, staff, and students,” he said. “I want everyone to know they are the most important part of the College.”

In parting

Galil – a highly influential scholar in the fields of algorithmic design and analysis, and computational complexity and cryptography – is a member of the National Academy of Engineering, and a fellow of the Association for Computing Machinery and of the American Academy of Arts & Sciences. Prior to coming to Georgia Tech, he served as the dean of engineering at Columbia University and the president of Tel Aviv University.

Yet, he views his deanship at GT Computing as the most satisfying period of his career.

“In OMSCS, we pioneered a program that proved high-quality, cost-reduced online education at scale is doable, and that it satisfies an unmet need – being radically more accessible and affordable than on-campus options,” Galil said. “I view it as my greatest achievement.”

As for his message to GT Computing faculty, staff, students, and alumni, “GO JACKETS!”

School of Computer Science Professors and Co-Directors of the Center for Research into Novel Computing Hierarchies (CRNCH) Vivek Sarkar and Tom Conte and School of Computational Science and Engineering’s Chair David Bader and Associate Professor Richard Vuduc are co-investigators on this project from Tech. The award will also be used to support research collaborators at University of Illinois, University of Michigan, and University of Southern California.

“This is a unique opportunity to address post-Moore computing challenges through new research on software and hardware co-optimization by adapting the hardware to executing applications and the data sets being analyzed,” said Sarkar. “Advancing data analysis algorithms and pushing the boundaries of hardware are areas of strength for Georgia Tech, and we’re excited to work with our partners at Illinois, Michigan, and USC on this important challenge for future computing platforms.”

The project is part of the Defense Advanced Research Project Agency’s (DARPA) Electronics Resurgence Initiative (ERI), a five-year upwards of $1.5 billion investment in the future of domestic electronic systems. Building on the tradition of other successful government-industry partnerships, ERI aims to forge forward-looking collaborations among the commercial electronics community, defense industrial base, university researchers, and the Department of Defense. They expect to create a more specialized, secure, and heavily automated electronics industry that serves the needs of both the domestic commercial and defense sectors. Tech researchers will work under the Software Defined Hardware (SDH) program, which creates malleable hardware/software architectures that allow an application to defer hardware configuration to runtime.  

This research seeks to enable developers to easily create applications while the new system automatically optimizes their performance on new and emerging architectures. These improvements will make architectures more energy efficient for data analytics applications, including those in the machine learning and artificial intelligence domains.

“Under this program, our project should make programming next-generation hardware easy and productive,” said Bader. “We are looking at novel software and hardware co-design that lets users rapidly take advantage of new architectural features.”

The program goals also fit with CRNCH’s mission to find new paths forward in this post-Moore’s law age, when the number of transistors on a chip cannot be expected to double every 1.5 to 2 years, as it has for decades.

The Emu Chick is an eight-node system housed in a tower case that is designed to move computation to data, providing sufficient memory and storage bandwidth for common data analysis applications. Having new architectures like the Emu Chick in the Rogues Gallery allows academics, students, and industry professionals the opportunity to collaborate on hardware.

Working with this early release hardware has led to a strong partnership with Emu Technologies as students and researchers have learned how to use the machine effectively. Researchers submitted more than 15 bug requests related to Emu simulation framework, toolchain, and hardware execution. These requests allowed Emu to fix multiple bugs, improving the Emu toolchain and system’s performance and stability. “Students’ creativity and persistence in running their codes with each agile iteration of both hardware and toolchain enabled Emu to test a far wider range of issues than we could have been able to develop and test on our own, resulting in Emu developing better bug diagnosis tools and delivering complete fixes,” said Emu Chief Operating Officer Martin Deneroff.

Yet this relationship was mutually beneficial to Tech, too. Emu and Tech collaborated on using the prototype to enhance Institute development priorities for irregular applications, tensor decomposition, and other applications. For many students, this was also the first time they were able to work directly with industry. “The Rogues Gallery gives researchers the opportunity to test their ideas on unique platforms and get actual results at larger scale,” said computer architecture Ph.D. student Cameron Braun. Students get the rare opportunity to work with industry leaders also interested in the hardware, such as the researcher from Sandia National Laboratories who became Braun’s mentor and later offered him a summer internship.

For alumnus Eric Hein, Emu started off as a way to experiment with the coolest computers and eventually led to his first job after he finished his Ph.D. in spring 2018. Everything with the Chick was new and different, including how Hein started thinking about his approach to architecture. “Several weird aspects of the architecture like automatic thread migrations and hardware indexing modes forced me to rethink the way I wrote code from the ground up, reading between the lines to reason about how each decision would influence the behavior of the system,” he said.

Hein got so good at thinking about the Emu programming model that he became a technical resource for Chick users at Tech and beyond, eventually creating a custom STREAM implementation that can handle memory errors and scale to a large number of threads. This work led to a full-time position at Emu, where he understands the architecture as well as its developers but can relate to it from a user perspective. Such a partnership wouldn’t have been possible without his work with the Rogues Gallery.  “If it weren't for CRNCH, I might never have heard of Emu,” he said.

Industry leaders are also recognizing the value of merging academic researchers with emerging technologies. In fall 2017, CRNCH met with Sandia researchers to discuss a Kokkos Cilk backend for running Kokkos on the Emu system. This discussion influenced a new partnership between Sandia and School of Computational Science and Engineering Professor Umit Catalyurek and School of Computer Science Research Scientist Jeff Young in 2018. These partnerships can also exist outside of the Rogues Gallery, such as with recent National Science Foundation funding for a project led by CRNCH Co-Director Vivek Sarkar and Emu founder Peter Kogge that is focused on migrating thread architectures and asynchronous task models for graph analytics applications.

Emu and CRNCH’s partnership has given every participant a competitive advantage. ”The ability to tap into technically strong researchers who are grounded in hands-on experience with our product, coupled with the strong industry partnerships Tech engages in, gives Emu an immediate leg up as we do on-going market research related to product requirements to address market problems that are only just beginning to emerge,” said Anne Vincenti, Emu’s vice president of marketing.

Emu is just the first successful partnership for CRNCH. Field programmable gate arrays (FPGAs) with stacked memory, neuromorphic devices, and other unique hardware are being added to the Rogues Gallery, and CRNCH is always looking for more collaborators. For more information on the Rogues Gallery and on related Emu work, please see the Rogues Gallery page and Emu’s site.

The all-day event featured overview talks and hands-on sessions with this novel hardware, known as field-programmable analog arrays (FPAA). It was led by School of Electrical and Computer Engineering and CRNCH Professor Jennifer Hasler. Several local and industry participants also presented short talks on their research into neuromorphic computing and current challenges in the area.

An FPAA is a configurable chip that uses analog and digital logic to implement algorithms, drastically reducing the power and size of the chip. For certain applications like neuromorphic computing, analog requires fewer transistors to do the same amount of work as digital and produces fewer errors. While analog computing is traditionally a challenging field for computer scientists, hardware like the FPAA and associated high-level and open-source toolsets developed by Hasler’s group allow researchers to create new analog-based algorithms.

“A single programmable and configurable analog chip can compute a large number of things,” Hasler said.

Providing new avenues for computing performance

Neuromorphic computers replicate the brain in structure, meaning they are highly parallel, run at lower power, and the fundamental unit computation is very small. The low-power nature of FPAAs makes them ideal for neuromorphic computing. Analog and digital hardware like the FPAA could be pivotal to providing new avenues for computing performance in the post-Moore’s law era, in which the number of transistors on an integrated circuit are no longer expected to double roughly every two years as they have for the past half-century.

“Interesting, novel hardware may be able to solve this post-Moore problem,” said Jeff Young, a research scientist in the School of Computer Science and organizer of the workshop.

The workshop gathered Tech students as well as researchers from prominent national labs such as Sandia, Oak Ridge, Lawrence Livermore, and Pacific Northwest National Laboratory. The speakers’ short research talks expanded on how neuromorphic computing will evolve to tackle post-Moore challenges, including:

• Catherine Schumann, Oak Ridge National Laboratory, Evolutionary optimization (EO) training for neuromorphic systems
   
• Fred Rothganger, Sandia National Laboratories, N2A: A computational tool for modeling from neurons to algorithms
   
• Constantine Dovrolis, SCS professor, From the Spatio-Temporal Organization of the Brain to Adaptive and Safe Lifelong Learning Machines
   
• Antonino Tumeo, Pacific Northwest National Laboratory, Exploring the intersection of graph analytics and machine learning

As a follow-up to the workshop, the FPAA will be added to the Rogues Gallery, CRNCH’s collection of obscure and unique hardware. CRNCH provides researchers from around the world access to these machines as part of its strategic goal of rethinking high performance computing. When the gallery launched in fall 2017, it had one specialized type of hardware, the Emu Chick, but has since grown to include field-programmable gate arrays (FPGAs), 3D stacked memory devices, and now the FPAA.

The White House Office for Science and Technology Policy (OSTP) is hosting the daylong meeting, which executives from 35 major U.S. companies including Facebook, Amazon, Google, Intel, NVIDIA, and Oracle are expected to attend.

The focus of the meeting is AI research and development, workforce, and regulations.

Georgia Tech College of Computing Executive Associate Dean Charles Isbell, along with a small group of his peers from academia, has been invited to participate in the discussions.

“There’s not a sector in the U.S. economy that isn’t being impacted by AI,” said Isbell. “But that doesn’t mean that what makes regulatory sense for, say the auto industry, will necessarily make sense for pharmaceuticals.”

He added, “The U.S. has a real opportunity to take the lead and set the standard for the ethical, human-centered development of AI – regardless of the sector – to deliver on the promise of this transformative technology in ways that we have yet to imagine.”

Representatives from the Pentagon and the U.S. Departments of Agriculture, Commerce, Energy, Health and Human Services, Labor, and Transportation are also slated to participate in the White House AI meeting.

Isbell was in Washington earlier this year testifying before the House Oversight Committee’s Subcommittee on Information Technology about the national and global impact of AI and machine learning.

[WATCH: CRNCH Time at Georgia Tech for Rebooting Computing Architecture]

The National Academies of Science, Engineering, and Medicine’s National Materials and Manufacturing Board (NMMB) Spring 2018 Meeting will address this question with its session Moore’s Law: Where We’ve Been and Where We Are Going in an Age at the End of Scaling on March 20 at the National Academies in Washington, D.C.

Tom Conte, a School of Computer Science professor and co-director of the Post-Moore–focused Center for Research into Novel Computing Hierarchies (CRNCH), joins the event to offer his perspective on technology and alternative paths.

The session is part of a larger daylong event during which the NMMB hopes to identify areas that could impact government policymakers and program managers. Specialized electronics are integral to the defense industry, which needs reliable products that can be produced at low cost.

The post-Moore era is ripe for opportunities in technological innovation but could also present challenges in policy and economics. During this session, industry, academia, and government experts will discuss what the future of computing faces—from how to prolong the life of transistors to exploring alternative materials and architectures to push it forward.

The session will be divided into three panels on:

• Dennard Scaling / Equivalent Scaling
• Alternative trajectories, evaluating different materials
• Economics and policy

The Georgia Tech College of Computing continued its climb up the U.S. News and World Report rankings of graduate computer science programs, rising one spot to No. 8 in the 2018 rankings that were released March 20.

The new position represents Georgia Tech’s second jump in the last three CS rankings, all released since 2012, and is the highest U.S. News has ever ranked the College of Computing.

GT Computing's global impact

“We are thrilled but not surprised at this latest recognition of the work we’re doing in GT Computing,” said Zvi Galil, John P. Imlay Jr. Dean of Computing.

“I attribute this to our visible leadership in computing education and research, to the fact that we are now the largest computing program in the United States counting both faculty and students–and likely number 2 in terms of faculty size–and to the global impact we are having both through our research and the work of our thousands of alumni.”

U.S. News ranks computer science programs through a reputational survey. With our average score of 4.4, Georgia Tech has now tied with Princeton and one spot ahead of No. 10 University of Texas-Austin. In the 2018 rankings, Georgia Tech rose in both points and ranking—and was the only Top 10 program to rise in either.

The College also achieved rankings in the following specialties:

• Artificial Intelligence (No. 7)
• Programming Language (No. 16)
• Systems (No. 10)
• Theory (No. 9)

Coincidentally, the No. 8 overall ranking matches the spot Georgia Tech earned in last year’s Times Higher Education/Wall Street Journal rankings, when the College was named the No. 8 program in the world.

Other GT ranking highlights

“Over the past several years,” Galil continued, “we have made deliberate, strategic investments of time and treasure, both in research and education, and this recognition is one of the fruits of those efforts.”

The College of Computing was just one of many Georgia Tech programs to place highly in the 2018 rankings.

The College of Engineering also ranked No. 8 (No. 4 among public universities), and all 11 of its programs ranked in the top 10. In the College of Sciences, Chemistry jumped four to No. 20, Math moved up two to No. 26, Physics moved up one to No. 28, Earth Sciences moved up four to No. 38, and Biology moved up one to No. 54. Within mathematics, the discrete math/combinatorics specialty had Georgia Tech at No. 2, up two positions.

[READ: U.S. News and World Report 2019 Graduate School Rankings]

The Scheller College of Business full-time MBA program moved up one to No. 28, and its part-time MBA moved up five to No. 25. Scheller was also ranked in the following specialties:

• Production/Operations (No. 7)
• Supply Chain/Logistics (No. 17)
• Information Systems (No. 12)

In the Ivan Allen College of Liberal Arts, the Sam Nunn School of Public Policy moved up two to No. 43 overall with the Information and Technology Management specialty remaining at No. 2, Public Policy Analysis debuting at No. 20 and the Environmental Policy and Management specialty debuting at No. 12.

Constellations is dedicated to challenging and improving the national computer science (CS) educational ecosystem through the provision of curricular content, educational policy assessment, and development of strategic institutional partnerships. According to Senior Director Kamau Bobb, democratizing computing requires a “real reckoning with the race and class divisions of contemporary American life.” 

Building Equitable Infrastructure

The central challenge facing the United States in computing education is that there simply are not enough K-12 teachers or university faculty at any level to meet the demand of students or the needs of industry. In Georgia, there are approximately 519,000 high school students. In the 2016-17 school year less than 10 percent, only 43,000 students, enrolled in CS courses of any kind. Of the approximately 600 teachers instructing those students, only 33 of them were certified by the state professional standards commission.

However, like any limited and valuable commodity in American life, access is strongly correlated with race, class, and privilege. Black students, for example, comprise 13 percent of all students taking CS courses, even though they represent 37 percent of all public high school students in the state. This pattern is replicated in many states across the country.

“We’re trying to build an equitable infrastructure for CS education within a national educational system that is tragically inequitable. We see this as an issue of educational justice,” said Bobb, who comes to Georgia Tech from the National Science Foundation (NSF), where he served as a program officer in NSF’s Directorate for Computer & Information Science & Engineering.

“As computing emerges from under the STEM umbrella as a national priority and a pathway to power and social mobility in America, there is a tremendous amount of collaboration, development, and advocacy to do. Georgia Tech is putting the full weight of its research capacity and programmatic innovation into this effort.”

Computing Skills Critical to Everyone

Bobb is joined at Constellations by Lien Diaz, who serves as director of educational innovation and leadership. Diaz previously was with The College Board as director of curriculum, instruction, and assessment. In a partnership with the NSF, she led the development of the new Advanced Placement (AP) Computer Science Principles course that launched in the fall of 2016.

[READ: Positive Signs, But Diversity Still Lagging in AP Computer Science Exam Participation]

“For decades now, computing fields have lacked female representation and racial diversity in the workforce,” Diaz said. “When I was at AP, the goals behind developing CS Principles are quite similar to what we’re trying to do at Constellations: We want to show how relevant computing is, no matter where you live, or what your gender or the color of your skin is. We want to dispel the myth that computing is only for a certain population. It’s for everyone, and computing skills will be too critical to everyone in our future society for us to simply accept the current disparities in access to computing education.”

TIme of Reckoning for Industry

Constellations comes at a critical time, as the technology industry is being forced to reckon with calls for equity as never before. Like Diaz, Bobb brings critical experience in addressing these very issues. In his role at NSF, he helped construct a national research agenda intended to accomplish many of Constellations major goals, which include:

• Intentionally addressing issues of race and class that directly affect student achievement in computing;
• Moving beyond traditional brick and mortar constraints of educational spaces;
• Addressing the limitations of the national teacher corps through innovative human-technical solutions and the coordination of formal and informal learning.
• With initial funding both from the Institute and private philanthropy, Constellations is taking a comprehensive approach. Constellations sits in the College of Computing but will work with multiple units across the Institute with a shared goal of addressing the many layers of equity in computing.

“The lack of diversity in computing is well-documented and represents a real threat to the nation’s political, economic, and cultural standing in the world,” said Charles Isbell, executive associate dean in the College of Computing.

“Many university faculty members have devoted their research energy to understanding the most effective methods for computing education and increasing access for all students. The College’s ongoing work to offer Georgia Tech CS courses and support to Atlanta Public Schools (APS) and other districts across the state has deepened our grass-roots understanding of the barriers to equity.”

That ongoing work with APS is just one of the reasons why Georgia Tech provides the perfect home for Constellations. College of Computing faculty members Betsy DiSalvo, Barb Ericson, and Mark Guzdial are nationally recognized leaders in the study and design of effective CS educational programs and the systemic barriers to equity in CS education. The College itself, through its Office of Outreach, Enrollment, and Community and the work of Assistant Dean Cedric Stallworth, has a long history of computing outreach and teacher-training programs.

“The Constellations Center aims to highlight Atlanta’s diverse communities, promote the concealed talent that exists to contribute to a growing technology-driven workforce, and diminish racial and gender divides in American social and tech spaces,” Bobb said. “Computing is not just a matter of education, it is an element of a fair and just democracy.”

The analysis – released to coincide with National Computer Science Education Week – examines College Board data on 2017 national results of the Advanced Placement Computer Science (AP CS) A exam and the recently introduced AP CS Principles (P) exam.

Increasing female & minority access

According to Barbara Ericson, Georgia Tech research scientist and author of the analysis, the introduction this year of a new AP CS P course and exam contributed to the increases.

“This is exactly what we hoped for. The CS principles course is on par with a college-level intro course for non-CS majors, so it is more accessible to more people,” said Ericson.

Officials had estimated nearly 20,000 AP CS P exams would be taken this year. However, Ericson said the actual number topped 40,000.

“Although overall growth in female and minority participation in the AP CS A exam was relatively flat this year, we’re hopeful that the introduction of the P exam will help swell A exam participation rates in the next few years.”

AP Computer Science A

Despite marginal growth among underrepresented students, overall participation in the AP CS A exam grew by 11.2 percent year-over-year in 2017. A record 60,519 U.S. high school students took the exam with an overall pass rate of 61.8 percent, up more than a percentage point from the previous year.

“It’s great to see growth across the board, but there’s still a long way to go before AP computer science is as available in U.S. classrooms as, say, AP Physics or Calculus,” said Ericson.

More than 170,000 students took the AP Physics 1 exam this year, while more than 316,000 took the AP Calculus AB exam.

Negative stereotypes impacting outcomes

“Increasing the penetration rate for CS is critically important to the U.S. remaining competitive in an international marketplace increasingly reliant on computing and hungry for highly skilled and well-trained computer science talent,” said Ericson.

Despite some positive movement this year, the analysis shows that more needs to be done to improve outcomes for female and underrepresented students. The CS A exam had the lowest participation rate among female students than any other AP exam this year.

The pass rate nationally for women taking the AP CS A exam was 64 percent, which was lower than males by 3.8 percent. The pass rate for African American females was 26.1 percent. In 12 states, no African American females took the exam.

Comprising just 16 percent of all exam takers, the pass rate for underrepresented students was 44 percent.

“Many of these students have less exposure and less confidence in their ability to do computer science,” Ericson said. “They also encounter negative stereotypes about computer science, either people telling them CS is not for them or that CS is boring, antisocial, and doesn’t help anybody.”

AP Computer Science P

In its initial year, 43,780 AP CS Principles exams were given following the 2016 introduction of the new course offering.

Female students represented 30 percent of AP CS P exam takers, while 26 percent were from underrepresented groups, which include American Indian/Alaska Native, Black, Hispanic/Latino, and Native Hawaiian/Other Pacific Islanders. This was the second highest rate of underrepresented minority participation for all STEM (science, technology, engineering, and math) AP exams.

Opportunity to build on success

Overall, the pass rate for the AP CS P exam was 75.1 percent. However, the same disparity that exists between majority and minority outcomes on the AP CS A exam is also evident in the P exam.

The pass rate for women was 70 percent, lower than their male counterparts by 6 percent. At 53 percent, the pass rate for underrepresented students was nearly 30 percent lower than the majority on the CS principles exam.

“The goal of the CS P course is to provide an engaging and rigorous introduction to computer science to a broad diversity of students. While the CS P exam takers are more diverse than those who took the CS A exam, the percentage of females is still low and under-represented students have a lower pass rate on both exams," said Ericson.

“More work needs to be done to recruit and support females and minorities in computer science. Hopefully, as a nation, we can build on the initial success of CS P to truly offer computer science for all students.”

Yet, secure internet and its applications are now essential to almost every aspect of our daily lives. 

Today, America’s national defense, economic prosperity, and individual freedoms depend upon cybersecurity.  

As the storm of demand for cybersecurity solutions and talent grows, Georgia Institute of Technology researchers, faculty members, and students are tackling cybersecurity from multiple angles.

Read the Full Story:

White Hats, Black Hats, Grey Matter: Tackling Cybersecurity

For the 2017-18 academic year, GT Computing is welcoming 10 new tenure-track faculty members. With specialties ranging from machine learning, algorithms, and high-performance computing to artificial intelligence, robotics, and cryptography, these new faculty members bring a diverse set of interests and experience to the GT Computing community.

“Our new faculty members are among the best of the best in their respective fields and their collective teaching abilities and research acumen are highly sought after from industry and academia,” said John P. Imlay Jr. Dean of Computing Zvi Galil. “Each of them is certain to be a true asset to the College of Computing community and we are delighted to welcome them to Georgia Tech.”

Of the 10 new tenure-track faculty members, two are in the School of Computational Science and Engineering (CSE), five are from School of Computer Science (CS), and three in the School of Interactive Computing (IC).

New CSE faculty members include Assistant Professor Tobin Issac and Professor Felix Herrmann. Hermann holds a joint appointment between CSE and the schools of Earth and Atmospheric Sciences and Electrical and Computer Engineering.

More information about CSE’s new faculty members is available.

Assistant Professors Jacob Abernathy, Xu Chu, and Jamie Morgenstern, and Associate Professor Vladimir Kolesnikov have joined the CS faculty ranks. And, Professor Vivek Sarkar has taken a position in CS as a Stephen Fleming Chair for Telecommunications.

More information about CS’s new faculty members is available.

The new School of IC faculty members are Assistant Professors Sauvik Das and Matthew Gombolay. Professor Seth Hutchinson now fills the KUKA Chair for Robotics in the School of IC and is the associate director of the Institute for Robotics and Intelligent Machines.

More information about IC’s new faculty members is available.

There will be one panel each on Friday, Saturday, and Sunday that features a member of the College. All three are part of the video game track at the Westin.

The following is a rundown on events that will feature GT Computing panelists.

Augmented and Virtual Reality, 1 p.m. Friday at the Westin Augusta E-G

• This panel will feature School of Interactive Computing (IC) Professor Blair MacIntyre and Maribeth Coleman, who is the director of the Interactive Media Technology Center (IMTC) and associate director of interactive media for the Institute for People and Technology (IPaT). The panel will look at the history and future of virtual reality in video games, and also feature Roger Altizer (University of Utah), and Mike Capps (former president of Epic Games).

Dystopian Tech and Gaming, 11:30 a.m. Saturday at the Westin Augusta E-G

• This panel will also feature MacIntyre, Coleman, and Altizer, along with Georgia Tech Research Scientist Clint Zeagler (wearable computing, textile interfaces, animal computer interaction) and Emory University Professor Susan Tamasi (linguistics). The panel examines the ramifications of connecting our lives more closely through technology and the way we tell stories through that. What effect does gamifying our lives, health, experiences, and relationships have on our humanity and the future of how we relate to what surrounds us?

Toys That Are Changing the Future of Gaming, 5:30 p.m. Sunday at the Westin Augusta E-G

• Coleman and MacIntyre will be joined by IC Professor Thad Starner and IMTC Research Scientist Laura Levy. José P. Zagal (University of Utah) will also be on the panel. Panelists will discuss revolutionary technology like neural interfaces, contact lens monitors, and more innovations just over the horizon for consumers. Additionally, they will talk about how we could co-opt that tech for video games.

Dragon Con is a multigenre convention founded in 1987 that takes place annually over Labor Day weekend in Atlanta. As of 2016, the convention draws over 77,000 attendees, features hundreds of guests, and encompasses five hotels in the Peachtree Center neighborhood of downtown Atlanta.

The initiative—“IEEE Rebooting Computing”—proposes a fundamental, holistic reexamination of the computer, including all aspects from device to user interface. The “reboot” is necessary because single-core processor performance stalled in 2005. The hardware industry created multicore processors, but these have limitations. 

Now, even multicore processors are having performance issues because of the anticipated end of Moore’s Law -- a widely accepted observation that the amount of transistors on an integrated circuit would double every two years. Regularly increasing a circuit’s transistor capacity helped computers achieve faster processing speeds, but increases in transistor speeds have only been marginal for years. Resultant, necessary shortcuts have become ineffective.

“Until now, we’ve always been able to proceed anyway, knowing computers would go twice as fast in 18 months,” Conte said. “We cannot rely on that any longer.”

That’s why IEEE chose to act. 

IEEE’s Rebooting Computing Initiative and its collaborator – the industry-led International Technology Roadmap for Semiconductors (ITRS) – have thus far hosted four summits of government, industry, and academic thought leaders in Silicon Valley and Washington, D.C. Summit participants focused on the three pillars of future computing: what computers will be used for (i.e., human/computer interface and applications), how energy-efficient computers can be made, and how secure they can become.

“We hope to influence industry and policymakers to change the direction of computing,” Conte said. “We’re trying to make people realize that they cannot be complacent; we have to act and find a solution.”

The possible solutions are a bit unconventional: Allow computers to produce approximate results, rather than computing to the customary 100th decimal point? Use non-digital computation? Or use models of the human brain in hardware? Some industry leaders consider all of these postulations “crazy,” but Conte says all options should be on the table.

“Skepticism of any idea is not a luxury we can afford at this point in time, with the challenges we have,” Conte said. “The possibilities are vast, as are the problems. Changing the technology that has permeated virtually every facet of the human condition is not going to happen without enormous effort and investment.”

“I believe Georgia Tech has the right expertise at the right time and is uniquely positioned to help lead a response to this challenge today.”

Tom Conte likes cars. He gets paid to talk about computers. Problem is, people tend to be more mystified by computers than by cars. So Conte puts the two together and uses cars (and things related to them) to explain computers. He does this a lot.

"For instance, I’ve compared pipelining and parallelism to multi-lane highways, and I’ve compared computer architecture to designing efficient interchanges,” says Conte, professor of computer science. “You use different cars for different purposes, just like computers.

“People,” he concedes, “get sick of my car analogies.”

Or maybe they just recognize passion when they see it—much like the drive and energy toward computers that has propelled Conte intellectually since his teenage days in Delaware, when “computer room” were still novelties in American high schools. Programming came naturally to Conte, who likened their intellectual tidiness to geometry proofs.

“It fired some neurons,” he says.

A few years later Conte was about to finish his bachelor’s in electrical engineering from the University of Delaware, and he was looking around for graduate schools where he could build computers. At the University of Illinois, he met Ed Davidson. Working for Davidson, Tom found that the design for a newsupercomputer had a fundamental flaw; its processor-to-memory interconnect—the multi-lane highway between the memory and the CPUs—would not take six CPU cycles, as they thought. Conte found out it would take more like 11,000 cycles.

In 1992, armed with a brand-new Ph.D. from Illinois, Conte sent out more than 70 job applications, which resulted in a grand total of three interviews and two job offers. Luckily, one of those offers was from the University of South Carolina, which may not have boasted a Top 10 computer science program but did share its locale with one Ms. Catherine Linder, who soon thereafter was set up with Conte on a blind date. The two were married in March of 1994.

It was in Conte’s next job, at North Carolina State University, where his career really hit its stride. “N.C. State was a natural choice; I looked for an engineering university in the South that had ties to industry,” says Conte, who joined the school’s electrical and computer engineering faculty in 1995. “They had a new department head, who trusted me as an assistant professor to set the vision for how we should grow computer engineering. We recruited [new Ph.D. graduates] from the top schools, and I’m proud to say [N.C. State’s] computer architecture program is one of the top programs around the country.”

Recruited in 2008 to lead Georgia Tech’s computer architecture group, Conte hopes to accomplish something similar in Atlanta in the field of manycore computing. Conte envisions a future of computation in which single chips carry thousands of processing cores, enabling speeds that vastly surpass current capabilities. The key to building one of these machines, he says, is to tap the ideas and know-how of several disciplines. And that’s why he chose to come further south.

“Georgia Tech has all the ingredients,” says Conte, recently elected to the IEEE Computer Society’s Board of Governors, as well as named editor in chief of the Association for Computing Machinery’s Transactions on Architecture and Code Optimization. “We have a top computer science department, and a top electrical engineering department. I view this as yet another opportunity to do what I love, which is to build computers.”

And talk about cars. And do woodworking and photography. And collect vintage calculators and watches. (“I have too many hobbies,” Conte says.) He is fascinated, he says, by purely mechanical methods of keeping time, by watches and clocks built solely of gears that can stay accurate to within a second a week. Though he carries the title of computer scientist, Conte is at least as much an engineer, something that comes both from personal proclivity and professional training.

“I do an inordinate amount of industry-funded research—you have to, in computer architecture,” he says. “It keeps you practical and grounded in real problems. People ask me about computer architecture: ‘Is it how you build transistors?’ No, I tell them, it’s about how you organize the system. Just like a highway engineer.”